| Title | SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Park, Jungmin, Cho, Seongjoon, Lim, Taejin, Bhunia, Swarup, Tehranipoor, Mark |
| Conference Name | 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) |
| Date Published | nov |
| Keywords | BSI AIS 31, clock frequency modulation, cryptography, deterministic random bit generator, Entropy, FPGA, Human Behavior, Metrics, NIST SP 800-22/90B, PCB module, power side-channel attack and countermeasure, power side-channel attacks, pubcrawl, QRNG, quantum entropy chip, quantum entropy source, Quantum random number generator, radioactive decay, radioactive isotope decay, random frequency clock generator, random key generation, random masking, random number generation, random number generators, Resiliency, Scalability, SCR-QRNG framework, security primitives, side-channel countermeasures, side-channel leakages, side-channel resistant design, side-channel resistant primitives, side-channel resistant QRNG, unbiased random numbers |
| Abstract | Random number generators play a pivotal role in generating security primitives, e.g., encryption keys, nonces, initial vectors, and random masking for side-channel countermeasures. A quantum entropy source based on radioactive isotope decay can be exploited to generate random numbers with sufficient entropy. If a deterministic random bit generator (DRBG) is combined for post-processing, throughput of the quantum random number generator (QRNG) can be improved. However, general DRBGs are susceptible to side-channel attacks. In this paper, we propose a framework called SCR-QRNG framework, which offers Side-Channel Resistant primitives using QRNG. The QRNG provides sources of randomness for modulating the clock frequency of a DRBG to obfuscate side-channel leakages, and to generate unbiased random numbers for security primitives. The QRNG has robustness against power side-channel attacks and is in compliance with NIST SP 800-22/90B and BSI AIS 31. We fabricate a quantum entropy chip, and implement a PCB module for a random frequency clock generator and a side-channel resistant QRNG on an FPGA. |
| DOI | 10.1109/ICCAD45719.2019.8942152 |
| Citation Key | park_scr-qrng_2019 |
SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator