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2021-08-18
Sravya, G., Kumar, Manchalla. O.V.P., Sudarsana Reddy, Y., Jamal, K., Mannem, Kiran.  2020.  The Ideal Block Ciphers - Correlation of AES and PRESENT in Cryptography. 2020 3rd International Conference on Intelligent Sustainable Systems (ICISS). :1107—1113.
In this digital era, the usage of technology has increased rapidly and led to the deployment of more innovative technologies for storing and transferring the generated data. The most important aspect of the emerging communication technologies is to ensure the safety and security of the generated huge amount of data. Hence, cryptography is considered as a pathway that can securely transfer and save the data. Cryptography comprises of ciphers that act like an algorithm, where the data is encrypted at the source and decrypted at the destination. This paper comprises of two ciphers namely PRESENT and AES ciphers. In the real-time applications, AES is no more relevant especially for segmenting the organizations that leverage RFID, Sensors and IoT devices. In order to overcome the strategic issues faced by these organization, PRESENT ciphers work appropriately with its super lightweight block figure, which has the equivalent significance to both security and equipment arrangements. This paper compares the AES (Advance encryption standard) symmetric block cipher with PRESENT symmetric block cipher to leverage in the industries mentioned earlier, where the huge consumption of resources becomes a significant factor. For the comparison of different ciphers, the results of area, timing analysis and the waveforms are taken into consideration.
2021-01-22
Skovajsová, L..  2019.  Comparison of Cryptography by Chaotic Neural Network and by AES. 2019 IEEE 19th International Symposium on Computational Intelligence and Informatics and 7th IEEE International Conference on Recent Achievements in Mechatronics, Automation, Computer Sciences and Robotics (CINTI-MACRo). :000029–000032.

In this paper, the two methods for ciphering are presented and compared. The aim is to reveal the suitability of chaotic neural network approach to ciphering compared to AES cipher. The durations in seconds of both methods are presented and the two methods are compared. The results show, that the chaotic neural network is fast, suitable for ciphering of short plaintexts. AES ciphering is suitable for longer plaintexts or images and is also more reliable.

2020-09-08
Skovajsová, Lenka.  2019.  Comparison of Cryptography by Chaotic Neural Network and by AES. 2019 IEEE 19th International Symposium on Computational Intelligence and Informatics and 7th IEEE International Conference on Recent Achievements in Mechatronics, Automation, Computer Sciences and Robotics (CINTI-MACRo). :000029–000032.
In this paper, the two methods for ciphering are presented and compared. The aim is to reveal the suitability of chaotic neural network approach to ciphering compared to AES cipher. The durations in seconds of both methods are presented and the two methods are compared. The results show, that the chaotic neural network is fast, suitable for ciphering of short plaintexts. AES ciphering is suitable for longer plaintexts or images and is also more reliable.
2020-08-28
Singh, Kuhu, Sajnani, Anil Kumar, Kumar Khatri, Sunil.  2019.  Data Security Enhancement in Cloud Computing Using Multimodel Biometric System. 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA). :175—179.
Today, data is all around us, every device that has computation power is generating the data and we can assume that in today's world there is about 2 quintillion bytes of data is been generating every day. as data increase in the database of the world servers so as the risk of data leak where we are talking about unlimited confidential data that is available online but as humans are developing their data online so as its security, today we've got hundreds of way to secure out data but not all are very successful or compatible there the big question arises that how to secure our data to hide our all the confidential information online, in other words one's all life work can be found online which is on risk of leak. all that says is today we have cloud above all of our data centers that stores all the information so that one can access anything from anywhere. in this paper we are introducing a new multimodal biometric system that is possible for the future smartphones to be supported where one can upload, download or modify the files using cloud without worrying about the unauthorized access of any third person as this security authentication uses combination of multiple security system available today that are not easy to breach such as DNA encryption which mostly is based on AES cipher here in this paper there we have designed triple layer of security.
2017-02-13
M. Ayoob, W. Adi.  2015.  "Fault Detection and Correction in Processing AES Encryption Algorithm". 2015 Sixth International Conference on Emerging Security Technologies (EST). :7-12.

Robust and stringent fault detection and correction techniques in executing Advanced Encryption Standard (AES) are still interesting issues for many critical applications. The purpose of fault detection and correction techniques is not only to ensure the reliability of a cryptosystem, but also protect the system against side channel attacks. Such errors could result due to a fault injection attack, production faults, noise or radiation effects in deep space. Devising a proper error control mechanisms for AES cipher during execution would improve both system reliability and security. In this work a novel fault detection and correction algorithm is proposed. The proposed mechanism is making use of the linear mappings of AES round structure to detect errors in the ShiftRow (SR) and MixColumn (MC) transformations. The error correction is achieved by creating temporary redundant check words through the combined SR and MC mapping to create in case of errors an error syndrome leading to error correction with relatively minor additional complexity. The proposed technique is making use of an error detecting and correcting capability in the combined mapping of SR and MC rather than detecting and/or correcting errors in each transformation separately. The proposed technique is making use especially of the MC mapping exhibiting efficient ECC properties, which can be deployed to simplify the design of a fault-tolerance technique. The performance of the algorithm proposed is evaluated by a simulated system model in FPGA technology. The simulation results demonstrate the ability to reach relatively high fault coverage with error correction up to four bytes of execution errors in the merged transformation SR-MC. The overall gate complexity overhead of the resulting system is estimated for proposed technique in FPGA technology.