Biblio
Filters: Keyword is concurrent engineering [Clear All Filters]
.
2015. Hardware Design and Verification Techniques for Supply Chain Risk Mitigation. 2015 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics). :238–239.
We present a brief survey on the state-of-the-art design and verification techniques: IC obfuscation, watermarking, fingerprinting, metering, concurrent checking and verification, for mitigating supply chain security risks such as IC misusing, counterfeiting and overbuilding.