Zhang, Jin, Jin, Dahai, Gong, Yunzhan.
2018.
File Similarity Determination Based on Function Call Graph. 2018 IEEE International Conference on Electronics and Communication Engineering (ICECE). :55—59.
The similarity detection of the program has important significance in code reuse, plagiarism detection, intellectual property protection and information retrieval methods. Attribute counting methods cannot take into account program semantics. The method based on syntax tree or graph structure has a very high construction cost and low space efficiency. So it is difficult to solve problems in large-scale software systems. This paper uses different decision strategies for different levels, then puts forward a similarity detection method at the file level. This method can make full use of the features of the program and take into account the space-time efficiency. By using static analysis methods, we get function features and control flow features of files. And based on this, we establish the function call graph. The similar degree between two files can be measured with the two graphs. Experimental results show the method can effectively detect similar files. Finally, this paper discusses the direction of development of this method.
Patnaik, Satwik, Ashraf, Mohammed, Sinanoglu, Ozgur, Knechtel, Johann.
2018.
Best of Both Worlds: Integration of Split Manufacturing and Camouflaging into a Security-Driven CAD Flow for 3D ICs. 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). :1—8.
With the globalization of manufacturing and supply chains, ensuring the security and trustworthiness of ICs has become an urgent challenge. Split manufacturing (SM) and layout camouflaging (LC) are promising techniques to protect the intellectual property (IP) of ICs from malicious entities during and after manufacturing (i.e., from untrusted foundries and reverse-engineering by end-users). In this paper, we strive for “the best of both worlds,” that is of SM and LC. To do so, we extend both techniques towards 3D integration, an up-and-coming design and manufacturing paradigm based on stacking and interconnecting of multiple chips/dies/tiers. Initially, we review prior art and their limitations. We also put forward a novel, practical threat model of IP piracy which is in line with the business models of present-day design houses. Next, we discuss how 3D integration is a naturally strong match to combine SM and LC. We propose a security-driven CAD and manufacturing flow for face-to-face (F2F) 3D ICs, along with obfuscation of interconnects. Based on this CAD flow, we conduct comprehensive experiments on DRC-clean layouts. Strengthened by an extensive security analysis (also based on a novel attack to recover obfuscated F2F interconnects), we argue that entering the next, third dimension is eminent for effective and efficient IP protection.
Shey, James, Karimi, Naghmeh, Robucci, Ryan, Patel, Chintan.
2018.
Design-Based Fingerprinting Using Side-Channel Power Analysis for Protection Against IC Piracy. 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). :614—619.
Intellectual property (IP) and integrated circuit (IC) piracy are of increasing concern to IP/IC providers because of the globalization of IC design flow and supply chains. Such globalization is driven by the cost associated with the design, fabrication, and testing of integrated circuits and allows avenues for piracy. To protect the designs against IC piracy, we propose a fingerprinting scheme based on side-channel power analysis and machine learning methods. The proposed method distinguishes the ICs which realize a modified netlist, yet same functionality. Our method doesn't imply any hardware overhead. We specifically focus on the ability to detect minimal design variations, as quantified by the number of logic gates changed. Accuracy of the proposed scheme is greater than 96 percent, and typically 99 percent in detecting one or more gate-level netlist changes. Additionally, the effect of temperature has been investigated as part of this work. Results depict 95.4 percent accuracy in detecting the exact number of gate changes when data and classifier use the same temperature, while training with different temperatures results in 33.6 percent accuracy. This shows the effectiveness of building temperature-dependent classifiers from simulations at known operating temperatures.
Perez, Claudio A., Estévez, Pablo A, Galdames, Francisco J., Schulz, Daniel A., Perez, Juan P., Bastías, Diego, Vilar, Daniel R..
2018.
Trademark Image Retrieval Using a Combination of Deep Convolutional Neural Networks. 2018 International Joint Conference on Neural Networks (IJCNN). :1—7.
Trademarks are recognizable images and/or words used to distinguish various products or services. They become associated with the reputation, innovation, quality, and warranty of the products. Countries around the world have offices for industrial/intellectual property (IP) registration. A new trademark image in application for registration should be distinct from all the registered trademarks. Due to the volume of trademark registration applications and the size of the databases containing existing trademarks, it is impossible for humans to make all the comparisons visually. Therefore, technological tools are essential for this task. In this work we use a pre-trained, publicly available Convolutional Neural Network (CNN) VGG19 that was trained on the ImageNet database. We adapted the VGG19 for the trademark image retrieval (TIR) task by fine tuning the network using two different databases. The VGG19v was trained with a database organized with trademark images using visual similarities, and the VGG19c was trained using trademarks organized by using conceptual similarities. The database for the VGG19v was built using trademarks downloaded from the WEB, and organized by visual similarity according to experts from the IP office. The database for the VGG19c was built using trademark images from the United States Patent and Trademarks Office and organized according to the Vienna conceptual protocol. The TIR was assessed using the normalized average rank for a test set from the METU database that has 922,926 trademark images. We computed the normalized average ranks for VGG19v, VGG19c, and for a combination of both networks. Our method achieved significantly better results on the METU database than those published previously.
Ernawan, Ferda, Kabir, Muhammad Nomani.
2018.
A blind watermarking technique using redundant wavelet transform for copyright protection. 2018 IEEE 14th International Colloquium on Signal Processing Its Applications (CSPA). :221—226.
A digital watermarking technique is an alternative method to protect the intellectual property of digital images. This paper presents a hybrid blind watermarking technique formulated by combining RDWT with SVD considering a trade-off between imperceptibility and robustness. Watermark embedding locations are determined using a modified entropy of the host image. Watermark embedding is employed by examining the orthogonal matrix U obtained from the hybrid scheme RDWT-SVD. In the proposed scheme, the watermark image in binary format is scrambled by Arnold chaotic map to provide extra security. Our scheme is tested under different types of signal processing and geometrical attacks. The test results demonstrate that the proposed scheme provides higher robustness and less distortion than other existing schemes in withstanding JPEG2000 compression, cropping, scaling and other noises.
Holland, Martin, Stjepandić, Josip, Nigischer, Christopher.
2018.
Intellectual Property Protection of 3D Print Supply Chain with Blockchain Technology. 2018 IEEE International Conference on Engineering, Technology and Innovation (ICE/ITMC). :1—8.
Within “Industrie 4.0” approach 3D printing technology is characterized as one of the disruptive innovations. Conventional supply chains are replaced by value-added networks. The spatially distributed development of printed components, e.g. for the rapid delivery of spare parts, creates a new challenge when differentiating between “original part”, “copy” or “counterfeit” becomes necessary. This is especially true for safety-critical products. Based on these changes classic branded products adopt the characteristics of licensing models as we know them in the areas of software and digital media. This paper describes the use of digital rights management as a key technology for the successful transition to Additive Manufacturing methods and a key for its commercial implementation and the prevention of intellectual property theft. Risks will be identified along the process chain and solution concepts are presented. These are currently being developed by an 8-partner project named SAMPL (Secure Additive Manufacturing Platform).
Cammarota, Rosario, Banerjee, Indranil, Rosenberg, Ofer.
2018.
Machine Learning IP Protection. 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). :1—3.
Machine learning, specifically deep learning is becoming a key technology component in application domains such as identity management, finance, automotive, and healthcare, to name a few. Proprietary machine learning models - Machine Learning IP - are developed and deployed at the network edge, end devices and in the cloud, to maximize user experience. With the proliferation of applications embedding Machine Learning IPs, machine learning models and hyper-parameters become attractive to attackers, and require protection. Major players in the semiconductor industry provide mechanisms on device to protect the IP at rest and during execution from being copied, altered, reverse engineered, and abused by attackers. In this work we explore system security architecture mechanisms and their applications to Machine Learning IP protection.
Sengupta, Anirban, Roy, Dipanjan.
2018.
Reusable intellectual property core protection for both buyer and seller. 2018 IEEE International Conference on Consumer Electronics (ICCE). :1—3.
This paper presents a methodology for IP core protection of CE devices from both buyer's and seller's perspective. In the presented methodology, buyer fingerprint is embedded along seller watermark during architectural synthesis phase of IP core design. The buyer fingerprint is inserted during scheduling phase while seller watermark is implanted during register allocation phase of architectural synthesis process. The presented approach provides a robust mechanisms of IP core protection for both buyer and seller at zero area overhead, 1.1 % latency overhead and 0.95 % design cost overhead compared to a similar approach (that provides only protection to IP seller).
Zapirain, Esteban Aitor, Maris Massa, Stella.
2018.
Intellectual Property Management in Serious Games. 2018 IEEE Biennial Congress of Argentina (ARGENCON). :1—5.
The aim of this work is to perform an analysis on Technology Transfer strategies for the development of Serious Games at Public National Universities. The results can be extrapolated to other research topics and institutions. First of all, the University role as a producer of knowledge is studied, and possible scenarios for Technology Transfer to third-parties are considered. Moreover, the actors involved in the research and development processes and their corresponding Intellectual Property rights on the Research Results are identified and analysed. Finally, an Intellectual Property Rights protection analysis is undertaken to the different components of a Serious Game type of product, through the modalities of invention patents, utility models, industrial models and designs, brands and author rights. The work concludes that public universities are best fitted as knowledge factories, and the most promising scenario in Technology Transfer is that universities manage their Intellectual Property Rights and licence them to third-party institutions to handle commercialization, while keeping favorable conditions to finance subsequent research and ensuring that products derived from Research Results will be reachable by the society.
TÎTU, Mihail Aurel, POP, Alina Bianca, ŢÎŢU, Ştefan.
2018.
The correlation between intellectual property management and quality management in the modern knowledge-based economy. 2018 10th International Conference on Electronics, Computers and Artificial Intelligence (ECAI). :1—6.
The aim of this research paper is to highlight the intellectual property place and role within an industrial knowledge-based organization which performs design activities. The research begins by presenting the importance of integrating intellectual property policy implementation with quality policy. The research is based on the setting of objectives in the intellectual property field. This research also establishes some intellectual property strategies, and improvement measures for intellectual property protection management. The basis for these activities is correlation of the quality policy with an intellectual property policy, as well as the point of strength identified in the studied organization. The issues discussed in this scientific paper conclude on the possibility of the implementation of standards in the intellectual property field.
Wang, Tianhao, Kerschbaum, Florian.
2019.
Attacks on Digital Watermarks for Deep Neural Networks. ICASSP 2019 - 2019 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP). :2622—2626.
Training deep neural networks is a computationally expensive task. Furthermore, models are often derived from proprietary datasets that have been carefully prepared and labelled. Hence, creators of deep learning models want to protect their models against intellectual property theft. However, this is not always possible, since the model may, e.g., be embedded in a mobile app for fast response times. As a countermeasure watermarks for deep neural networks have been developed that embed secret information into the model. This information can later be retrieved by the creator to prove ownership. Uchida et al. proposed the first such watermarking method. The advantage of their scheme is that it does not compromise the accuracy of the model prediction. However, in this paper we show that their technique modifies the statistical distribution of the model. Using this modification we can not only detect the presence of a watermark, but even derive its embedding length and use this information to remove the watermark by overwriting it. We show analytically that our detection algorithm follows consequentially from their embedding algorithm and propose a possible countermeasure. Our findings shall help to refine the definition of undetectability of watermarks for deep neural networks.
Liang, Tung-Che, Chakrabarty, Krishnendu, Karri, Ramesh.
2019.
Programmable Daisychaining of Microelectrodes for IP Protection in MEDA Biochips. 2019 IEEE International Test Conference (ITC). :1—10.
As digital microfluidic biochips (DMFBs) make the transition to the marketplace for commercial exploitation, security and intellectual property (IP) protection are emerging as important design considerations. Recent studies have shown that DMFBs are vulnerable to reverse engineering aimed at stealing biomolecular protocols (IP theft). The IP piracy of proprietary protocols may lead to significant losses for pharmaceutical and biotech companies. The micro-electrode-dot-array (MEDA) is a next-generation DMFB platform that supports real-time sensing of droplets and has the added advantage of important security protections. However, real-time sensing offers opportunities to an attacker to steal the biochemical IP. We show that the daisychaining of microelectrodes and the use of one-time-programmability in MEDA biochips provides effective bitstream scrambling of biochemical protocols. To examine the strength of this solution, we develop a SAT attack that can unscramble the bitstreams through repeated observations of bioassays executed on the MEDA platform. Based on insights gained from the SAT attack, we propose an advanced defense against IP theft. Simulation results using real-life biomolecular protocols confirm that while the SAT attack is effective for simple instances, our advanced defense can thwart it for realistic MEDA biochips and real-life protocols.
Sun, Peiqi, Cui, Aijiao.
2019.
A New Pay-Per-Use Scheme for the Protection of FPGA IP. 2019 IEEE International Symposium on Circuits and Systems (ISCAS). :1—5.
Field-programmable gate arrays (FPGAs) are widely applied in various fields for its merit of reconfigurability. The reusable intellectual property (IP) design blocks are usually adopted in the more complex FPGA designs to shorten design cycle. IP infringement hence becomes a concern. In this paper, we propose a new pay-per-use scheme using the lock and key mechanism for the protection of FPGA IP. Physical Unclonable Function (PUF) is adopted to generate a unique ID for each IP instance. An extra Finite State Machine (FSM) is introduced for the secure retrieval of PUF information by the FPGA IP vendor. The lock is implemented on the original FSM. Only when the FPGA developer can provide a correct license, can the FSM be unlocked and start normal operation. The FPGA IP can hence be protected from illegal use or distribution. The scheme is applied on some benchmarks and the experimental results show that it just incurs acceptably low overhead while it can resist typical attacks.
Showkatramani, Girish J., Khatri, Nidhi, Landicho, Arlene, Layog, Darwin.
2019.
A Secure Permissioned Blockchain Based System for Trademarks. 2019 IEEE International Conference on Decentralized Applications and Infrastructures (DAPPCON). :135—139.
A trademark may be a word, phrase, symbol, sound, color, scent or design, or combination of these, that identifies and distinguishes the products or services of a particular source from those of others. Obtaining a trademark is a complex, time intensive and costly process that involves varied steps before the trademark can be registered including searching prior trademarks, filing of the trademark application, review of the trademark application and final publication for opposition by the public. Currently, the process of trademark registration, renewal and validation faces numerous challenges such as the requirement for registration in different jurisdictions, maintenance of centralized databases in different jurisdictions, proving the authenticity of the physical trademark documents, identifying the violation and abuse of the intellectual property etc. to name a few. Recently, blockchain technology has shown great potential in a variety of industries such as finance, education, energy and resource management, healthcare, due to its decentralization and non-tampering features. Furthermore, in the recent years, smart contracts have attracted increased attention due to the popularity of blockchains. In this study, we have utilized Hyperledger fabric as the permissioned blockchain framework along with smart contracts to provide solution to the financial, procedural, enforcement and protection related challenges of the current trademark system. Our blockchain based application seeks to provide a secure, decentralized, immutable trademark system that can be utilized by the intellectual property organizations across different jurisdictions for easily and effectively registering, renewing, validating and distributing digital trademark certificates.
Deeba, Farah, Tefera, Getenet, Kun, She, Memon, Hira.
2019.
Protecting the Intellectual Properties of Digital Watermark Using Deep Neural Network. 2019 4th International Conference on Information Systems Engineering (ICISE). :91—95.
Recently in the vast advancement of Artificial Intelligence, Machine learning and Deep Neural Network (DNN) driven us to the robust applications. Such as Image processing, speech recognition, and natural language processing, DNN Algorithms has succeeded in many drawbacks; especially the trained DNN models have made easy to the researchers to produces state-of-art results. However, sharing these trained models are always a challenging task, i.e. security, and protection. We performed extensive experiments to present some analysis of watermark in DNN. We proposed a DNN model for Digital watermarking which investigate the intellectual property of Deep Neural Network, Embedding watermarks, and owner verification. This model can generate the watermarks to deal with possible attacks (fine tuning and train to embed). This approach is tested on the standard dataset. Hence this model is robust to above counter-watermark attacks. Our model accurately and instantly verifies the ownership of all the remotely expanded deep learning models without affecting the model accuracy for standard information data.
Yang, Fan, Shi, Yue, Wu, Qingqing, Li, Fei, Zhou, Wei, Hu, Zhiyan, Xiong, Naixue, Zhang, Yong.
2019.
The Survey on Intellectual Property Based on Blockchain Technology. 2019 IEEE International Conference on Industrial Cyber Physical Systems (ICPS). :743—748.
The characteristics of decentralization, tamper-resistance and transaction anonymity of blockchain can resolve effectively the problems in traditional intellectual property such as the difficulty of electronic obtaining for evidence, the high cost and low compensation when safeguarding the copyrights. Blockchain records the information through encryption algorithm, removes the third party, and stores the information in all nodes to prevent the information from being tampered with, so as to realize the protection of intellectual property. Starting from the bottom layer of blockchain, this paper expounds in detail the characteristics and the technical framework of blockchain. At the same time, according to the existing problems in transaction throughput, time delay and resource consumption of blockchain system, optimization mechanisms such as cross-chain and proof of stake are analyzed. Finally, combined with the characteristics of blockchain technology and existing application framework, this paper summarizes the existing problems in the industry and forecasts the development trend of intellectual property based on blockchain technology.
Xiao, Lijun, Huang, Weihong, Deng, Han, Xiao, Weidong.
2019.
A hardware intellectual property protection scheme based digital compression coding technology. 2019 IEEE International Conference on Smart Cloud (SmartCloud). :75—79.
This paper presents a scheme of intellectual property protection of hardware circuit based on digital compression coding technology. The aim is to solve the problem of high embedding cost and low resource utilization of IP watermarking. In this scheme, the watermark information is preprocessed by dynamic compression coding around the idle circuit of FPGA, and the free resources of the surrounding circuit are optimized that the IP watermark can get the best compression coding model while the extraction and detection of IP core watermark by activating the decoding function. The experimental results show that this method not only expands the capacity of watermark information, but also reduces the cost of watermark and improves the security and robustness of watermark algorithm.
Jiang, Tao, Hu, Shuijing.
2019.
Intellectual Property Protection for AI-Related Inventions in Japan. 2019 International Conference on Virtual Reality and Intelligent Systems (ICVRIS). :286—289.
To increase the possibility of patent entitled of artificial intelligence related inventions at the Japanese patent office, this paper analyzes the Japanese patent act and patent examination guidelines. The approach for assessing whether a computer related invention belongs to a eligible subject-matter includes two steps. The first step is whether a computer related invention meets the definition of an "invention" that is "creation of a technical idea utilizing the laws of nature" . The second step is whether a computer related invention meets "idea based on the standpoint of software" . From the perspective of patent analysis, Japan's artificial intelligence technology is leading the world, second only to the United States. In this field, the Japanese patent office is one of the most important intellectual property offices, and its legislation and practice of patent eligibility review for artificial intelligence related inventions have an important impact on the world.
Shayan, Mohammed, Bhattacharjee, Sukanta, Song, Yong-Ak, Chakrabarty, Krishnendu, Karri, Ramesh.
2019.
Can Multi-Layer Microfluidic Design Methods Aid Bio-Intellectual Property Protection? 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS). :151—154.
Researchers develop bioassays by rigorously experimenting in the lab. This involves significant fiscal and skilled person-hour investment. A competitor can reverse engineer a bioassay implementation by imaging or taking a video of a biochip when in use. Thus, there is a need to protect the intellectual property (IP) rights of the bioassay developer. We introduce a novel 3D multilayer-based obfuscation to protect a biochip against reverse engineering.