Biblio

This paper mainly investigates the physical layer security for visible light communication (VLC) based on spatial modulation (SM). The indoor VLC system includes multiple transmitters, a legitimate receiver and an eavesdropper. In the system, we consider two constraints of the input signal: non-negative and dimmable average optical intensity constraints. According to the principle of information theory and the spatial modulation scheme of uniform selection (US), the upper and the lower bounds on the secrecy rate for SM based VLC are derived, respectively. Numerical results show that the performance gap between the upper and lower bounds of the secrecy rate is small and relatively close, which indicates that the derived secrecy rate bounds can be used to evaluate the system performance. Moreover, when the number of transmitters is set to be one, the spatial modulation disappears, and the secrecy rate bounds in this paper are consistent with the existing results. To further improve the secrecy performance, a channel adaptive selection (CAS) scheme is proposed for selecting the active transmitter. Numerical result indicates that the CAS scheme has better performance than the US scheme.

This paper presents the design and VLSI implementation of a low-power HEVC main profile encoder, which is able to process up to 4096x2160@30fps 4:2:0 encoding in real-time with five-stage pipeline architecture. A pyramid ME (Motion Estimation) engine is employed to reduce search complexity. To compensate for the video sequences with fast moving objects, GME (Global Motion Estimation) are introduced to alleviate the effect of limited search range. We also implement an alternative 5x5 search along with 3x3 to boost video quality. For intra mode decision, original pixels, instead of reconstructed ones are used to reduce pipeline stall. The encoder supports DVFS (Dynamic Voltage and Frequency Scaling) and features three operating modes, which helps to reduce power consumption by 25%. Scalable quality that trades encoding quality for power by reducing size of search range and intra prediction candidates, achieves 11.4% power reduction with 3.5% quality degradation. Furthermore, a lossless frame buffer compression is proposed which reduced DDR bandwidth by 49.1% and power consumption by 13.6%. The entire video surveillance SoC is fabricated with TSMC 28nm technology with 1.96 mm2 area. It consumes 2.88M logic gates and 117KB SRAM. The measured power consumption is 103mW at 350MHz for 4K encoding with high-quality mode. The 0.39nJ/pixel of energy efficiency of this work, which achieves 42% $\backslash$textasciitilde 97% power reduction as compared with reference designs, make it ideal for real-time low-power smart video surveillance applications.