Biblio

Filters: Author is Reddi, Vijay Janapa  [Clear All Filters]
2018-05-10
Zou, An, Leng, Jingwen, Zu, Yazhou, Tong, Tao, Reddi, Vijay Janapa, Brooks, David, Wei, Gu-Yeon, Zhang, Xuan.  2017.  Ivory: Early-Stage Design Space Exploration Tool for Integrated Voltage Regulators. Proceedings of the 54th Annual Design Automation Conference 2017. :1:1–1:6.
2017-05-18
Chachmon, Nadav, Richins, Daniel, Cohn, Robert, Christensson, Magnus, Cui, Wenzhi, Reddi, Vijay Janapa.  2016.  Simulation and Analysis Engine for Scale-Out Workloads. Proceedings of the 2016 International Conference on Supercomputing. :22:1–22:13.

We introduce a system-level Simulation and Analysis Engine (SAE) framework based on dynamic binary instrumentation for fine-grained and customizable instruction-level introspection of everything that executes on the processor. SAE can instrument the BIOS, kernel, drivers, and user processes. It can also instrument multiple systems simultaneously using a single instrumentation interface, which is essential for studying scale-out applications. SAE is an x86 instruction set simulator designed specifically to enable rapid prototyping, evaluation, and validation of architectural extensions and program analysis tools using its flexible APIs. It is fast enough to execute full platform workloads–-a modern operating system can boot in a few minutes–-thus enabling research, evaluation, and validation of complex functionalities related to multicore configurations, virtualization, security, and more. To reach high speeds, SAE couples tightly with a virtual platform and employs both a just-in-time (JIT) compiler that helps simulate simple instructions efficiently and a fast interpreter for simulating new or complex instructions. We describe SAE's architecture and instrumentation engine design and show the framework's usefulness for single- and multi-system architectural and program analysis studies.