An Accelerator-based Architecture Utilizing an Efficient Memory Link for Modern Computational Requirements
| Title | An Accelerator-based Architecture Utilizing an Efficient Memory Link for Modern Computational Requirements |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Yousefzadeh, Saba, Basharkhah, Katayoon, Nosrati, Nooshin, Sadeghi, Rezgar, Raik, Jaan, Jenihhin, Maksim, Navabi, Zainalabedin |
| Conference Name | 2019 IEEE East-West Design Test Symposium (EWDTS) |
| Date Published | Sept. 2019 |
| Publisher | IEEE |
| ISBN Number | 978-1-7281-1003-5 |
| Keywords | Acceleration, accelerator-based architecture, automotive application, bussing system, composability, Computer architecture, Concurrency, concurrency (computers), configurable accelerators, CPS, cyber physical systems, efficient memory link, embedded system architecture, Embedded systems, Hardware accelerator, Heterogeneous systems, Kernel, Metrics, On-Chip Communication Architectures, Program processors, pubcrawl, Random access memory, resilience, Resiliency, security, Task Analysis |
| Abstract | Hardware implementation of many of today's applications such as those in automotive, telecommunication, bio, and security, require heavy repeated computations, and concurrency in the execution of these computations. These requirements are not easily satisfied by existing embedded systems. This paper proposes an embedded system architecture that is enhanced by an array of accelerators, and a bussing system that enables concurrency in operation of accelerators. This architecture is statically configurable to configure it for performing a specific application. The embedded system architecture and architecture of the configurable accelerators are discussed in this paper. A case study examines an automotive application running on our proposed system. |
| URL | https://ieeexplore.ieee.org/document/8884481/ |
| DOI | 10.1109/EWDTS.2019.8884481 |
| Citation Key | yousefzadeh_accelerator-based_2019 |
- embedded systems
- Task Analysis
- security
- Resiliency
- resilience
- Random access memory
- pubcrawl
- Program processors
- On-Chip Communication Architectures
- Metrics
- Kernel
- Heterogeneous systems
- Hardware accelerator
- Acceleration
- embedded system architecture
- efficient memory link
- cyber physical systems
- CPS
- configurable accelerators
- concurrency (computers)
- Concurrency
- computer architecture
- composability
- bussing system
- automotive application
- accelerator-based architecture