Visible to the public FPGA Implementation of Hardware Accelerator for Real-time Video Image Edge Detection

TitleFPGA Implementation of Hardware Accelerator for Real-time Video Image Edge Detection
Publication TypeConference Paper
Year of Publication2021
AuthorsWei, Xiangxiang, Du, Gao-Ming, Wang, Xiaolei, Cao, Hongfang, Hu, Shijie, Zhang, Duoli, Li, Zhenmin
Conference Name2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID)
KeywordsCameras, composability, Corrosion, edge detection, filtering algorithms, FPGA, Image edge detection, Image resolution, Median-filter, Metrics, pubcrawl, Real-time Systems, resilience, Resiliency, Scalability, security, Sobel, Streaming media
AbstractImage edge is considered to be the most important attribute to provide valuable image perception information. At present, video image data is developing towards high resolution and high frame number. The image data processing capacity is huge, so the processing speed is very strict to meet the real-time performance of image data transmission. In this context, we present a method to accelerate the real-time video image edge detection. FPGA is used as the development platform. The real-time edge detection algorithm of image data with 1280x720 resolution and 30 frame/s, combined with median filter, Sobel edge detection algorithm and corrosion expansion algorithm, makes the running time of image processing module shorter. The color image of the video image collected by camera is processed. The HDMI interface shows that the scheme has achieved ideal results in the FPGA hardware platform simulation model, greatly improves the efficiency of the algorithm, and provides a guarantee for the speed and stability of the real-time image processing system.
DOI10.1109/ASID52932.2021.9651710
Citation Keywei_fpga_2021