WHEA 2014

The Third IEEE International Workshop on Exploitation of Hardware Accelerators

held in conjunction with IEEE HPCS 2014

Call For Papers

The hardware accelerators (GPUs, co-Processors, FPGAs, ...) have become a fundamental component for computationally demanding disciplines such as realistic 3D computer graphics and high-performance scientific computing. The use of these accelerators for General-Purpose computation allow applications to achieves speedups and energy gains of orders of magnitude vs. optimized (single-core) CPU implementations. They have become powerful, capable, and inexpensive coprocessors useful for a wide variety of computation.

The aim of this workshop is to strongly encourage the exchange of experiences and knowledge in novel solutions exploiting and defining new trends in hardware accelerators, including hardware architecture, software tools, and applications.

The authors of the papers selected for the workshop may be invited to submit extended versions of their manuscripts to be considered for publication in a special issue.

The WEHA Workshop topics include (but are not limited to) the following:

• Novel Accelerator Architectures
• Languages and Compilers for Hardware Accelerators
• Libraries and Tools to Simplify the Programming of Hardware Accelerators
• Manual and Automatic Optimization Techniques
• Application Development Experience
• Benchmarking of Hardware Accelerators
• Modeling and Performance Prediction for Hardware Accelerators
• Application-specific Acceleration Hardware/Software
• Case Studies

Organizing Committee

Workshop Organizers:

Andrea Bartolini, University of Bologna, Italy
Carlo Cavazzoni, Cineca, Italy