Visible to the public Biblio

Filters: Author is Lustig, Daniel  [Clear All Filters]
2018-05-15
Lustig, Daniel, Sethi, Geet, Bhattacharjee, Abhishek, Martonosi, Margaret.  2017.  Transistency Models: Memory Ordering at the Hardware-OS Interface. IEEE Micro. 37:88–97.
Trippel, Caroline, Manerkar, Yatin A, Lustig, Daniel, Pellauer, Michael, Martonosi, Margaret.  2017.  TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA. Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems. :119–133.