IEEE D&T CFP: Special Issue on Cross-layer Design of Cyber-Physical Systems
IEEE Design & Test Call for Contributions to Special Issue on Cross-layer Design of Cyber-Physical Systems
Submission Deadline: 30 June, 2017
Topics of Interest:
This special issue will be on problems and innovative solutions on cross-layer design of all forms of cyber-physical systems. Solutions involving any two or more layers of design abstraction are welcome. The solicited topics include, but are not limited to:
- Model-based design of control systems
- Algorithm/architecture co-design for CPS
- Model-based testing of control software
- Formal verification of control software
- Modeling and verification of hybrid systems
- Cross-layer design for semiconductor reliability
- Scheduling for embedded control systems
- Control and vision, camera-based systems
- Applications in automotive, avionics, robotics, smart buildings, medical devices, automation
Important Dates:
* Manuscript submission: 30 June, 2017
* First round of reviews: 30 September, 2017
* Second round of reviews: 15 January, 2018
* Final manuscripts due: 28 February, 2018
Submission Guidelines:
Submission guidelines for IEEE D&T papers:
http://ieee-ceda.org/publications/d-t/paper-submission
Use submission category "Cross-layer-CPS" and submit via https://mc.manuscriptcentral.com/dandt
Guest Editors:
Anuradha Annaswamy (aanna@mit.edu), MIT, USA Samarjit Chakraborty (samarjit@tum.de), Technical University of Munich, Germany Jian-Jia Chen (jian-jia.chen@cs.uni-dortmund.de), Technical University of Dortmund, Germany Devendra Rai (devendra.rai@de.bosch.com), Bosch Corporate Research, Germany
Special Issue Theme:
Cyber-physical systems are characterized by a tight coordination between control algorithms, models of physical systems being controlled and the hardware/software platforms on which these controllers are implemented.
Such control systems are typically designed in multiple layers - at the top layer are high-level models (usually control algorithms), followed by software code generated from these models, below which is an operating system, which runs on a hardware platform often consisting of multiple processors connected by a communication architecture on which tasks and messages are scheduled.
Why cross-layer design? Most often, each of these layers are designed independently by different groups with completely different sets of expertise - control theorists, compiler designers, software engineers, operating system designers, embedded systems designers, computer architects, circuit designers and semiconductor experts. These multiple layers of abstraction with well-defined interfaces allow these groups to work independently, partition the entire design problem into manageable areas of expertise and have led to the phenomenal advancement in general purpose computing. However, when it comes to more specialized application domains - such as embedded controllers arising as hardware/software systems in automobiles, industrial automation systems, robots and a huge variety of other domains - these independently designed layers pose a serious problem.
Cross-layer design for CPS: For example, a vast majority of control algorithms at the high-level models layer are designed with idealistic assumptions, such as sensor values being instantaneously available to the controller, computing the control law takes zero (negligible) time, unbounded numerical precision, and that the underlying computational platform is perfect (free of any errors). As implementation platforms become more complex and distributed, these assumptions are increasingly not true. As a result, a provably "optimal" controller at the model level might not perform as desired in a concrete implementation. This results in significant ex post facto integration, testing and debugging efforts. For complex embedded control systems, it is well known that often more than 50% of the design effort is spent in integration, which has additional implications like problems with certification (especially for safety-critical systems), overprovisioning of resources, and inflexible designs. This problem is slowly extending to the circuit and semiconductor level because of semiconductor aging, soft errors and manufacturing variabilities stemming from semiconductor scaling. As a result, the underlying hardware platform in the future cannot assumed to be "fault free" and this has to be accounted for at the higher layers of design abstraction.
This special issue: The aim of this special issue is to highlight different aspects of this problem and discuss cross-layer design solutions for the design of cyber-physical systems. All layers of design abstraction - starting from high-level models, to software code, operating systems, architectures, and finally to circuits and semiconductors - are relevant for this special issue.
The term "cross-layer" should be interpreted in the broadest possible sense and may include any application domain such as automotive, transportation systems, building technologies, industrial automation systems and smart grids. In any of these domains, there is a potential "mismatch" between high-level algorithms or control strategies and their implementation platforms. Any technique to reconcile such mismatch may be classified as "Cross-layer design for CPS" and would be relevant for this special issue.