Comparative Analysis of Hardware Obfuscation for IP Protection
Title | Comparative Analysis of Hardware Obfuscation for IP Protection |
Publication Type | Conference Paper |
Year of Publication | 2017 |
Authors | Amir, Sarah, Shakya, Bicky, Forte, Domenic, Tehranipoor, Mark, Bhunia, Swarup |
Conference Name | Proceedings of the on Great Lakes Symposium on VLSI 2017 |
Publisher | ACM |
Conference Location | New York, NY, USA |
ISBN Number | 978-1-4503-4972-7 |
Keywords | Collaboration, combinational obfuscation, composability, hardware ip protection, ip protection, policy, policy-based governance, pubcrawl, Resiliency, sequential obfuscation |
Abstract | In the era of globalized Integrated Circuit (IC) design and manufacturing flow, a rising issue to the silicon industry is various attacks on hardware intellectual property (IP). As a measure to ensure security along the supply chain against IP piracy, tampering and reverse engineering, hardware obfuscation is considered a reliable defense mechanism. Sequential and combinational obfuscations are the primary classes of obfuscation, and multiple methods have been proposed in each type in recent years. This paper presents an overview of obfuscation techniques and a qualitative comparison of the two major types. |
URL | http://doi.acm.org/10.1145/3060403.3060495 |
DOI | 10.1145/3060403.3060495 |
Citation Key | amir_comparative_2017 |