Visible to the public Biblio

Filters: Author is Teich, Jürgen  [Clear All Filters]
2021-09-01
Walter, Dominik, Witterauf, Michael, Teich, Jürgen.  2020.  Real-time Scheduling of I/O Transfers for Massively Parallel Processor Arrays. 2020 18th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE). :1—11.
The following topics are dealt with: formal verification; formal specification; cyber-physical systems; program verification; mobile robots; control engineering computing; temporal logic; security of data; Internet of Things; traffic engineering computing.
2018-03-19
Pirkl, Jutta, Becher, Andreas, Echavarria, Jorge, Teich, Jürgen, Wildermann, Stefan.  2017.  Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics. Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems. :89–92.

Approximate Computing aims at trading off computational accuracy against improvements regarding performance, resource utilization and power consumption by making use of the capability of many applications to tolerate a certain loss of quality. A key issue is the dependency of the impact of approximation on the input data as well as user preferences and environmental conditions. In this context, we therefore investigate the concept of self-adaptive image processing that is able to autonomously adapt 2D-convolution filter operators of different accuracy degrees by means of partial reconfiguration on Field-Programmable-Gate-Arrays (FPGAs). Experimental evaluation shows that the dynamic system is able to better exploit a given error tolerance than any static approximation technique due to its responsiveness to changes in input data. Additionally, it provides a user control knob to select the desired output quality via the metric threshold at runtime.

2017-11-03
Weichslgartner, Andreas, Wildermann, Stefan, Götzfried, Johannes, Freiling, Felix, Glaß, Michael, Teich, Jürgen.  2016.  Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs. Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems. :153–162.
Different applications concurrently running on modern MPSoCs can interfere with each other when they use shared resources. This interference can cause side channels, i.e., sources of unintended information flow between applications. To prevent such side channels, we propose a hybrid mapping methodology that attempts to ensure spatial isolation, i.e., a mutually-exclusive allocation of resources to applications in the MPSoC. At design time and as a first step, we compute compact and connected application mappings (called shapes). In a second step, run-time management uses this information to map multiple spatially segregated shapes to the architecture. We present and evaluate a (fast) heuristic and an (exact) SAT-based mapper, demonstrating the viability of the approach.
2017-10-13
Weichslgartner, Andreas, Wildermann, Stefan, Götzfried, Johannes, Freiling, Felix, Glaß, Michael, Teich, Jürgen.  2016.  Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs. Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems. :153–162.

Different applications concurrently running on modern MPSoCs can interfere with each other when they use shared resources. This interference can cause side channels, i.e., sources of unintended information flow between applications. To prevent such side channels, we propose a hybrid mapping methodology that attempts to ensure spatial isolation, i.e., a mutually-exclusive allocation of resources to applications in the MPSoC. At design time and as a first step, we compute compact and connected application mappings (called shapes). In a second step, run-time management uses this information to map multiple spatially segregated shapes to the architecture. We present and evaluate a (fast) heuristic and an (exact) SAT-based mapper, demonstrating the viability of the approach.