Visible to the public Biblio

Filters: Author is Takemoto, Shu  [Clear All Filters]
2022-05-19
Takemoto, Shu, Ikezaki, Yoshiya, Nozaki, Yusuke, Yoshikawa, Masaya.  2021.  Hardware Trojan for Lightweight Cryptoraphy Elephant. 2021 IEEE 10th Global Conference on Consumer Electronics (GCCE). :944–945.
While a huge number of IoT devices are connecting to the cyber physical systems, the demand for security of these devices are increasing. Due to the demand, world-wide competition for lightweight cryptography oriented towards small devices have been held. Although tamper resistance against illegal attacks were evaluated in the competition, there is no evaluation for embedded malicious circuits such as hardware Trojan.To achieve security evaluation for embedded malicious circuits, this study proposes an implementation method of hardware Trojan for Elephant which is one of the finalists in the competition. And also, the implementation overhead of hardware Trojans and the security risk of hardware Trojan are evaluated.
2021-11-29
Takemoto, Shu, Shibagaki, Kazuya, Nozaki, Yusuke, Yoshikawa, Masaya.  2020.  Deep Learning Based Attack for AI Oriented Authentication Module. 2020 35th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC). :5–8.
Neural Network Physical Unclonable Function (NN-PUF) has been proposed for the secure implementation of Edge AI. This study evaluates the tamper resistance of NN-PUF against machine learning attacks. The machine learning attack in this study learns CPRs using deep learning. As a result of the evaluation experiment, the machine learning attack predicted about 82% for CRPs. Therefore, this study revealed that NN-PUF is vulnerable to machine learning attacks.
2020-03-02
Takemoto, Shu, Nozaki, Yusuke, Yoshikawa, Masaya.  2019.  Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller. 2019 IEEE 11th International Workshop on Computational Intelligence and Applications (IWCIA). :73–76.

Big data which is collected by IoT devices is utilized in various businesses. For security and privacy, some data must be encrypted. IoT devices for encryption require not only to tamper resistance but also low latency and low power. PRINCE is one of the lowest latency cryptography. A glitch canceller reduces power consumption, although it affects tamper resistance. Therefore, this study evaluates the tamper resistance of dedicated hardware with glitch canceller for PRINCE by statistical power analysis and T-test. The evaluation experiments in this study performed on field-programmable gate array (FPGA), and the results revealed the vulnerability of dedicated hardware implementation with glitch canceller.