Biblio

In this paper, two lightweight cryptography methods were introduced and developed on hardware. The PRESENT lightweight block cipher, and the DM-PRESENT lightweight hash function were implemented on Intel FPGA. The PRESENT core with 64-bit block data and 80-bit data key consumes 2,945 logic element, 1,824 registers, and 273,408 memory bits. Meanwhile, the DM-PRESENT core with 64-bit input and 80-bit key consumes 2,336 logic element, 1,380 registers, and 273,408 memory bits. The PRESENT core with 128-bit key and DM-PRESENT based on this core were also implemented. These cores were simulated for functional verification and embedded in NIOS II for implementation possibility on hardware. They consumed less logic resources and power consumption compared with conventional cryptography methods.

Of late, the massive use of pervasive devices in the electronics field has raised the concerns about security. In embedded applications or IoT domain implementing a full-fledged cryptographic environment using conventional encryption algorithms would not be practical because of the constraints like power dissipation, area and speed. To overcome such barriers the focus is on lightweight cryptography. In this paper a new lightweight PRESENT cipher has been proposed which has modified the original PRESENT cipher by reducing encryption round, modifying the Key Register updating technique and adding a new layer in between S-box layer and P-layer of the existing encryption-decryption process. The key register is updated by encrypting its value by adding delta value function of TEA (Tiny encryption algorithm), which is another lightweight cipher. The addition of extra layer helps us to reduce the PRESENT round from 31 to 25 which is the minimum round required for security. The efficiency of the proposed algorithm is increased by encrypting the key register. The proposed algorithm proves its superiority by analyzing different software parameter analysis like N-gram, Non-Homogeneity, Frequency Distribution graph and Histogram.

The strength of the substitution box (S-box) determines the security of the cryptographic algorithm because it's the only nonlinear component in the block cipher. Because of the disadvantages of non-uniformity sequence and limited range in the one-dimension (1D) chaotic map, this paper constructs the logistic map and the sine map into a combined chaotic map, and a new S-box construction method based on this combined chaotic map is presented. Performance tests were performed on the S-box, including nonlinearity, linear probability, differential probability, strict avalanche criterion, bits independence criterion. Compared with others S-box, this result indicates that the S-box has more excellent cryptographic performance and can be used as a nonlinear component in the lightweight block cipher algorithm.

In this fast moving world, every industry is advanced by a new technological paradigm called Internet of Things (IoT). It offers interconnectivity between the digital and the real world which will swiftly transform the style of doing business. It opens up a wide-ranging new array of dynamic opportunities in all industries and is fuelling innovation in every part of life. Due to the constrained nature of the devices in IoT environment, it is difficult to execute complex data encryption algorithms to enhance the security. Moreover, computation overhead caused by the existing cryptographic security algorithms is heavy and has to be minimized. To overcome these challenges, this paper presents the security analysis of the lightweight block cipher SAT\_Jo to ensure the data security in healthcare Internet of Things. It is based on SPN structure and runs for 31 rounds. It encrypts 64-bits of block length with key of 80 bits. Cadence NC-Verilog 5.1 is used for simulation and Cadence Encounter RTL Compiler v10.1 for synthesis. The implementations are synthesized for UMC 90 nm low-leakage Faraday library from technology libraries. Moreover, the proposed SAT\_Jo block cipher withstands in various attacks such as differential attack, linear attack and algebraic attack in healthcare IoT environment.

The number of resource-limited wireless devices utilized in many areas of Internet of Things is growing rapidly; there is a concern about privacy and security. Various lightweight block ciphers are proposed; this work presents a modified lightweight block cipher algorithm. A Linear Feedback Shift Register is used to replace the key generation function in the XTEA1 Algorithm. Using the same evaluation conditions, we analyzed the software implementation of the modified XTEA using FELICS (Fair Evaluation of Lightweight Cryptographic Systems) a benchmarking framework which calculates RAM footprint, ROM occupation and execution time on three largely used embedded devices: 8-bit AVR microcontroller, 16-bit MSP microcontroller and 32-bit ARM microcontroller. Implementation results show that it provides less software requirements compared to original XTEA. We enhanced the security level and the software performance.

Lightweight block ciphers, which are required for IoT devices, have attracted attention. Simeck, which is one of the most popular lightweight block ciphers, can be implemented on IoT devices in the smallest area. Regarding the hardware security, the threat of electromagnetic analysis has been reported. However, electromagnetic analysis of Simeck has not been reported. Therefore, this study proposes a dedicated electromagnetic analysis for a lightweight block cipher Simeck to ensure the safety of IoT devices in the future. To our knowledge, this is the first electromagnetic analysis for Simeck. Experiments using a FPGA prove the validity of the proposed method.