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2018-06-07
Bresch, C., Michelet, A., Amato, L., Meyer, T., Hély, D..  2017.  A red team blue team approach towards a secure processor design with hardware shadow stack. 2017 IEEE 2nd International Verification and Security Workshop (IVSW). :57–62.

Software attacks are commonly performed against embedded systems in order to access private data or to run restricted services. In this work, we demonstrate some vulnerabilities of commonly use processor which can be leveraged by hackers to attack a system. The targeted devices are based on open processor architectures OpenRISC and RISC-V. Several software exploits are discussed and demonstrated while a hardware countermeasure is proposed and validated on OpenRISC against Return Oriented Programming attack.

2018-04-11
Kramer, Sean, Zhang, Zhiming, Dofe, Jaya, Yu, Qiaoyan.  2017.  Mitigating Control Flow Attacks in Embedded Systems with Novel Built-in Secure Register Bank. Proceedings of the on Great Lakes Symposium on VLSI 2017. :483–486.

Embedded systems are prone to security attacks from their limited resources available for self-protection and unsafe language typically used for application programming. Attacks targeting control flow is one of the most common exploitations for embedded systems. We propose a hardware-level, effective, and low overhead countermeasure to mitigate these types of attacks. In the proposed method, a Built-in Secure Register Bank (BSRB) is introduced to the processor micro-architecture to store the return addresses of subroutines. The inconsistency on the return addresses will direct the processor to select a clean copy to resume the normal control flow and mitigate the security threat. This proposed countermeasure is inaccessible for the programmer and does not require any compiler support, thus achieving better flexibility than software-based countermeasures. Experimental results show that the proposed method only increases the area and power by 3.8% and 4.4%, respectively, over the baseline OpenRISC processor.