CFP - DSD 2013 16th Euromicro Conference on Digital System Design

The Euromicro Conference on Digital System Design (DSD) addresses all aspects of (embedded, pervasive and high-performance) digital and mixed hardware/software system engineering, covering the whole design trajectory from requirement specification down to micro-architectures, digital circuits and their VLSI implementations. It is a

discussion forum for researchers and engineers from academia and industry working on state investigations, developments and applications.

It focuses on today's and future challenging applications, advanced system architectures, application analysis and parallelization for embedded and high-performance hardware and software system-level design, design automation methods and tools for all design levels, as well as, on modern implementation technologies from full custom in nanometer technology nodes, through FPGAs, to multi-core infrastructures. It covers a multitude of highly relevant design aspects from system, hardware and embedded-software specification, modeling, analysis, synthesis and validation, through system adaptability, security, dependability and fault tolerance, to system energy consumption minimization and multi-objective optimization.

• T1: (APP) Applications of (embedded) digital systems.
• T2: (AP-HwSw) Application analysis and parallelization for embedded and high-performance design.
• T3: (SMVT) System, hardware and embedded-software specification, modeling, verification and test.
• T4: (SHES) System, hardware and embedded software design and automatic synthesis.
• T5: (SoC & NoC) Systems-on-a-chip and networks-on-a-chip.
• T6: (RC) Programmable/re-configurable/adaptable architectures.
• T7: (ET) Important issues introduced by emerging technologies.

• SS1: (FDR) Flexible Digital Radio - Dominique Noguet (CEA - Minatec, FR)
• SS2: (MSDA) Multicore Systems: Design and Applications - Julio Sahuquillo (UPV Valencia, ES)
• SS3: (DTDS) Dependability and Testing of Digital Systems - Hana Kubatova (CTU Prague, CZ)
• SS4: (FTDSD) Fault Tolerance in Digital Systems Design - Zdenek Kotasek (TU Brno, CZ)
• SS5: (E3S) Energy-Efficient Embedded Systems - Twan Basten (TU Eindhoven, NL)
• SS6: (AHSA) Architectures and Hardware for Security Applications - Paris Kitsos (Hellenic Open U, GR)
• SS7: (MoRPS) Monitoring and Reconfiguration of Parallel Systems - E. Nigussie, P. Lijeberg (U Turku, FI)
• SS8: (DCPS) Design of Heterogeneous Cyber-Physical Systems - Davide Quaglia (U Verona, IT)
• SS9: (EPDSD) European Projects in Digital System Design - F. Leporati (U Pavia, IT), L. Jozwiak (TUE, NL)

Authors are encouraged to submit their manuscripts to http://www.easychair.org/conferences/?conf=dsd2013 or, should an unexpected web access problem be encountered, to send the paper directly to the Program Chair by email (jsm@fe.up.pt), before the deadline for submission.

Each manuscript should include the complete paper text, all illustrations, and references. The manuscript should conform to the required IEEE format: single-spaced, double column, A4/US letter page size, 10-point size Times Roman font, up to 8 pages. In order to conduct a blind review, no indication of the authors' names should appear in the submitted manuscript, references included.

CPS, Conference Publishing Services, publishes the DSD Proceedings, which are available worldwide through the IEEE Xplore Digital Library. An extended version of the selected best papers will be published in a special issue of the ISI-indexed "Microprocessors and Microsystems: Embedded Hardware Design" journal, printed by Elsevier.

DSD STEERING COMMITTEE
Lech Jozwiak (TU Eindhoven, NL) - Chairman
Krzysztof Kuchcinski (U Lund, SE)

Antonio Nunez (IUMA/ULPGC, ES)
Francesco Leporati (U Pavia, IT)

DSD 2013 PROGRAM CHAIRS
Jose Silva Matos (U Porto, PT) - Chair
Francesco Leporati (U Pavia, IT) - Co-chair

DSD 2013 GENERAL CHAIR

Eugenio Villar (U Cantabria, ES)

P. Athanas (Virginia Tech, US)
H. Basson (U. Littoral, FR)

T. Basten (TU Eindhoven, NL)
L. Benini (U. Bologna, IT)

M. Berekovic (Braunschweig, DE)
N. Bergman (U Queensland, AU)
C. Bouganis (Imp. Coll., UK)

P. Carballo (ULPGC, ES)
L. Chen (NTU, TW)

T. Chen (Colorado St., US)

R. Corvino (TU Eindhoven, NL)
G. Danese (U Pavia, IT)

B. De Sutter (U Ghent, BE)
J. Dekeyser (INRIA, FR)

R. Drechsler (U Bremen, DE)
N. Dutt (U Cal, US)

L. Fanucci (U Pisa, IT)

J. Ferreira (U Porto, PT)

M. Figueroa (U Concepcion, CL)
V. Goulart (U Kyushu, JP)

J. Haid (Infineon, AT)

I. Hamzaoglu (U Sabanci, TR)
D. Houzet (Grenoble IT, FR)

L. Jozwiak (TU Eindhoven, NL)
B. Juurlink (TU Berlin, DE)

K. Kent (U New Brunswick, CN)
P. Kitsos (Hellenic Open U, GR)
Z. Kotasek, (TU Brno, CZ)

H. Kubatova (CTU Prague, CZ)
K. Kuchcinski (U Lund, SE)

S. Kumar (U Jonkoping, SE)

A. Lastovetsky (U Coll Dublin, IE)
F. Leporati (U Pavia, IT)

I. Levin (U Tel-Aviv, IL)
S. Lopez (ULPGC, ES)
W. Luk (Imp Coll, UK)

E. Martins (U Aveiro, PT)
J. Matos (U Porto, PT)

H. Michail (UT Cyprus, CY)
T. Mitra (U Singapore)

V. Muthukumar (U Nevada, US)
N. Nedjah (U Rio de Janeiro, BR)
H. Neto (UT Lisboa, PT)

S. Niar (U Valenciennes, FR)
D. Noguet (CEA, FR)

A. Nunez (ULPGC, ES)

A. Orailoglu (U Cal San Diego, US)
O. Ozturk (U Bilkent, TR)

A. Pawlak (ITE&SUT, PL)

K. Popovici (Mathworks, US)

A. Postula (U Queensland, AU)
Y. Qu (Renesas Mobile, FI)

D. Quaglia (U Verona, IT)

J. Sahuquillo (U Pol Valencia, ES)
T. Sasao (Kyushu IT, JP)

J. Schmidt (CTU Prague, CZ)
A. Shrivastava (U Arizona, US)
C. Silvano (Pol Milano, IT)

N. Sklavos (TEI Patras, GR)
L. Sousa (UT Lisboa, PT)

W. Stechele (TU Munich, DE)
A. Tokarnia (U Campinas, BR)
R. Ubar (IT Tallin, EE)

M. Valero (U Pol Catalunya, ES)
M. Velev (Aries Design, US)

H. Vierhaus (BTU Cottbus, DE)
F. Leporati (U Pavia, IT),
L. Jozwiak (TUE, NL)

E. Villar (U Cantabria, ES)
S. Vitabile (U. Palermo, IT)
C. Wolinski (IRISA, FR)

A. Yurdakul (U Bogazici, TR)