Visible to the public Side-Channel Attack Resistance—2021Q3Conflict Detection Enabled

Submitted by heechul on Sat, 10/09/2021 - 3:31am

PI(s): Heechul Yun

HARD PROBLEM(S) ADDRESSED: Resilient Architectures

This project is developing OS and architecture techniques to defend against potential microarchitectural side-channel attacks on embedded computing platforms for safety-critical systems. The project covers the hardware problems of (1) resilient architectures (primary) and (2) security-metrics-driven evaluation, design, development and deployment.

PUBLIC ACCOMPLISHMENT HIGHLIGHTS:

Our paper "Memory-Aware Denial-of-Service Attacks on Shared Cache in Multicore Real-Time Systems" was published in the journal of IEEE Transactions on Computers. The paper proposes a new memory-aware cache DoS attack, which can be mounded from the use-space and is significantly more effective in causing execution time increases to cross-core victims than memory-unaware state-of-the-art cache DoS attacks.

PUBLICATIONS FROM THE QUARTER

  • Michael Bechtel, Heechul Yun, "Memory-Aware Denial-of-Service Attacks on Shared Cache in Multicore Real-Time Systems," Transactions on Computers, 2021

COMMUNITY ENGAGEMENTS:

  • N/A

EDUCATIONAL ADVANCES:

  • N/A
Groups: