CPS: Medium: Embedded Fault Detection for Low-Cost, Safety-Critical Systems

Abstract: The objective of this research is to bring high levels of system reliability and integrity to application domains that cannot afford the cost, power, weight, and size associated with physical redundancy. The approach is to develop complementary monitoring algorithms and novel computing architectures that enable the detection of faults. In particular, there is a significant opportunity to reduce the reliance on physical redundancy by combining model-based and data-driven monitoring techniques. Implementing this approach to fault detection would be difficult with existing software and computing architectures. This motivates the development of a general purpose monitoring framework through monitoring-aware compilers coupled with enhancements to multi-core architectures. The intellectual merit of the project is twofold. First, it has the potential to lead to a novel fault detection approach that blends complementary monitoring algorithms. Second, advances in multi-core processors are leveraged to enable implementation of these fault detection approaches. This addresses key themes in cyber-physical systems by investigating the fundamental issue of fault detection for physical systems and by developing a generic processor architecture for monitoring. With respect to broader impact, project offers the potential for positive influences on industrial practice and education. If successful, the design ideas from this project can be incorporated into low-cost multi-core architectures suitable for embedded systems. The potentially transformative performance improvement offered by this framework could also impact current research in run-time verification and on-line monitoring. The research is to be incorporated into the course "Design, Build, Simulate, Test and Fly Small Uninhabited Aerial Vehicles" for senior undergraduate and first-year graduate students.