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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Cyclone II FPGA
biblio
"Development of platform using NIOS II soft core processor for image encryption and decryption using AES algorithm"
Submitted by grigby1 on Mon, 02/13/2017 - 2:13pm
NIOS II soft core processor
Image coding
image compression
image decryption
image encryption
information transmission
internet
MATLAB
microprocessor chips
network security
field programmable gate arrays
pubcrawl170102
QUARTUS II
scrambling plaintext
SOPC builder tool
standards
system-on-chip
system-on-programmable chip builder tool
W7 key stream generator
data compression
Advanced Encryption Standard (AES) Algorithm
AES encryption algorithm
Algorithm design and analysis
Altera DE2 FPGA board
computer network security
confidential image data protection
Cryptography
Cyclone II EP2C35F672
Cyclone II FPGA
advanced encryption standard
data storage
Data Transmission
digital communication network
digital data exchange cryptography
digital world Internet
discrete wavelet transform
DWT
encryption
