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Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

28nm SoC

biblio

Visible to the public 14.3 A 28nm SoC with a 1.2GHz 568nJ/prediction sparse deep-neural-network engine with \#x003E;0.1 timing error rate tolerance for IoT applications

Submitted by grigby1 on Thu, 06/07/2018 - 3:07pm
  • Internet of Things
  • VDD scaling
  • timing error rate tolerance
  • timing
  • Throughput
  • system-on-chip
  • sign-magnitude number format
  • Resiliency
  • resilience
  • Razor timing violation detection
  • pubcrawl
  • programmable FC-DNN accelerator design
  • Program processors
  • Neural Network Resilience
  • neural nets
  • IoT applications
  • 1.2GHz 568nJ/prediction sparse deep-neural-network engine
  • frequency 667 MHz
  • frequency 1.2 GHz
  • frequency 1 GHz
  • FCLK scaling
  • Error analysis
  • Engines
  • Energy Efficiency
  • datapath logic
  • data sparsity
  • circuit-level timing violation tolerance
  • circuit resilience
  • algorithmic resilience
  • algorithmic error tolerance
  • aggregate timing violation rates
  • 28nm SoC

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