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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Hardware Security Design
file
Side Channels through Lower-Level Caches Attachs, Defenses and Security Metrics
Submitted by Dmitry Ponomarev on Tue, 01/07/2020 - 11:46am. Contributors:
Dmitry Ponomarev
Nael Abu-Ghazaleh
Project Slides
Hardware Security Architecture
Hardware Security Design
Systems
1422401
SaTC PI Meeting 2019
file
Practical Hardware-Assisted Always-On Malware Detection
Submitted by Nael Abu-Ghazaleh on Tue, 01/07/2020 - 11:46am. Contributors:
Nael Abu-Ghazaleh
Dmitry Ponomarev
Lei Yu
Project Slides
Hardware Security Architecture
Hardware Security Design
Systems
1619322
1617915
SaTC PI Meeting 2019
file
Efficient Hardware-Aware and Hardware-Enabled Algorithms for Secure In-Memory Databases
Submitted by Rajeev Balasubram... on Tue, 01/07/2020 - 11:46am. Contributor:
Rajeev Balasubramonian
Project Slides
Hardware Security Architecture
Hardware Security Design
Systems
1718834
SaTC PI Meeting 2019
file
Digital Inequalities in the Heartland Exploring the Information Security Experiences of Marginalized Internet Users
Submitted by WGStaples on Mon, 01/06/2020 - 12:55pm. Contributor:
William Staples
Project Slides
Hardware Security Design
Privacy Applied
Social Behavioral and Economics Sciences
1742815
SaTC PI Meeting 2019
file
Design of Light-weight RRAM based Hardware Security Primitives for IoT Devices
Submitted by Shimeng Yu on Mon, 01/06/2020 - 12:55pm. Contributor:
Shimeng Yu
Project Slides
Hardware Security Design
1903631
SaTC PI Meeting 2019
file
Opportunities and Challenges for Resistive Random Access Memory Devices in Hardware Security and Trust.pdf
Submitted by Rashmi Jha on Wed, 12/18/2019 - 6:20pm. Contributor:
Rashmi Jha
Posters
Cryptography
Applied Cyber-Physical Systems
Hardware Security Design
1556301
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
TWC: Small: Side-Channels through Lower-Level Caches: Attacks, Defenses and Security Metrics
Submitted by Dmitry Ponomarev on Mon, 10/21/2019 - 12:29pm. Contributors:
Dmitry Ponomarev
Nael Abu-Ghazaleh
Posters
Hardware Security Architecture
Hardware Security Design
Systems
1422401
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
The Strength of Combined Distinguishers and Combined Side-Channel Attacks
Submitted by Selcuk Kose on Mon, 10/21/2019 - 12:29pm. Contributor:
Selcuk Kose
Posters
Hardware Security Architecture
Hardware Security Design
1929774
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
Secure CAN Logger
Submitted by Jeremy Daily on Mon, 10/21/2019 - 12:29pm. Contributors:
Duy Van
Jeremy Daily
Posters
cyber-physical systems
Hardware Security Design
Systems
Transition to Practice
1715409
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
CRII: SaTC: Robust Design-for-Security (DFS) Architecture for Enabling Trust in Integrated Circuits (IC) Manufacturing and Test
Submitted by ujjwal.guin@aubur... on Mon, 10/21/2019 - 12:28pm. Contributor:
Ujjwal Guin
Posters
Hardware Security Architecture
Hardware Security Design
1755733
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
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