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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Hardware Security Design
file
CRII: SaTC: Secure Branch Predictors for High Performance
Submitted by Dmitry Evtyushkin on Mon, 10/21/2019 - 12:28pm. Contributor:
dmitry evtyushkin
Posters
Hardware Security Architecture
Hardware Security Design
1850365
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
A Key Update Scheme for Side-Channel Attack Mitigation
Submitted by Fareena Saqib on Mon, 10/21/2019 - 12:28pm. Contributors:
Yutian Gui
Suyash Mohan Tamore
Ali Shuja Siddiqui
Fareena Saqib
Posters
Hardware Security Architecture
Hardware Security Design
1814420
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
Side-Channel Analysis and Resiliency Targeting Accelerators
Submitted by David Kaeli on Thu, 10/17/2019 - 2:32pm. Contributors:
David Kaeli
Yunsi Fei
Posters
Applied cryptography
Hardware Security Architecture
Hardware Security Design
1618379
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
SaTC: Core: Medium: Protecting Confidentiality and Integrity of Deep Neural Networks against Side-channel and Fault Attacks
Submitted by Yunsi Fei on Thu, 10/17/2019 - 2:32pm. Contributors:
Yunsi Fei
Xue Lin
Thomas Wahl
Posters
Formal Methods and Language-based Security
Hardware Security Architecture
Hardware Security Design
Secure Deep Neural Networks
1929300
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
SaTC: TTP: Medium: Collaborative: RESULTS: Reverse Engineering Solutions on Ubiquitous Logic for Trustworthiness and Security
Submitted by Yier Jin on Thu, 10/17/2019 - 2:32pm. Contributors:
Yier Jin
Shaojie Zhang
Posters
Hardware Security Design
Transition to Practice
1812071
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
Parameter Obfuscation: A Novel Methodology for the Protection of Analog Intellectual Property
Submitted by Ioannis Savidis on Thu, 10/17/2019 - 2:32pm. Contributor:
Ioannis Savidis
Posters
Applied cryptography
cyber-physical systems
Hardware Security Design
1556301
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
HISA Hardware Isolation-based Secure Architecture for CPU-FPGA Heterogenous Systems
Submitted by Sheng Wei on Thu, 10/17/2019 - 2:32pm. Contributor:
Sheng Wei
Posters
Hardware Security Architecture
Hardware Security Design
1912593
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
Data Oblivious ISA Extensions for Side Channel-Resistant and High-Performance Computing
Submitted by Christopher Fletcher on Thu, 10/17/2019 - 2:32pm. Contributors:
Christopher Fletcher
Jiyong Yu
Lucas Hsiung
Mohamad El Hajj
Posters
Applied cryptography
Hardware Security Architecture
Hardware Security Design
1816226
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
Computationally Enabled Robust, Low-Power True Random Number Generation
Submitted by Visvesh Sathe on Thu, 10/17/2019 - 2:32pm. Contributors:
Visvesh Sathe
Baozen Zhang
Posters
Applied cryptography
Authentication and Biometrics
Hardware Security Design
1714496
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
file
CAREER: Utilizing Principles of Energy Recovery Computing for Low-Energy and DPA-Resistant IoT Devices
Submitted by Himanshu Thapliyal on Thu, 10/17/2019 - 2:32pm. Contributor:
Himanshu Thapliyal
Posters
Hardware Security Design
1845448
SaTC PI Meeting 2019
2019
NSF
U.S. Government
Poster
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