Biblio

Filters: Author is Santikellur, Pranesh  [Clear All Filters]
2020-04-24
Balijabudda, Venkata Sreekanth, Thapar, Dhruv, Santikellur, Pranesh, Chakraborty, Rajat Subhra, Chakrabarti, Indrajit.  2019.  Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF. 2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST). :1—6.

Physical Unclonable Functions (PUFs) are vulnerable to various modelling attacks. The chaotic behaviour of oscillating systems can be leveraged to improve their security against these attacks. We have integrated an Arbiter PUF implemented on a FPGA with Chua's oscillator circuit to obtain robust final responses. These responses are tested against conventional Machine Learning and Deep Learning attacks for verifying security of the design. It has been found that such a design is robust with prediction accuracy of nearly 50%. Moreover, the quality of the PUF architecture is evaluated for uniformity and uniqueness metrics and Monte Carlo analysis at varying temperatures is performed for determining reliability.

2020-09-04
Chatterjee, Urbi, Santikellur, Pranesh, Sadhukhan, Rajat, Govindan, Vidya, Mukhopadhyay, Debdeep, Chakraborty, Rajat Subhra.  2019.  United We Stand: A Threshold Signature Scheme for Identifying Outliers in PLCs. 2019 56th ACM/IEEE Design Automation Conference (DAC). :1—2.

This work proposes a scheme to detect, isolate and mitigate malicious disruption of electro-mechanical processes in legacy PLCs where each PLC works as a finite state machine (FSM) and goes through predefined states depending on the control flow of the programs and input-output mechanism. The scheme generates a group-signature for a particular state combining the signature shares from each of these PLCs using \$(k,\textbackslashtextbackslash l)\$-threshold signature scheme.If some of them are affected by the malicious code, signature can be verified by k out of l uncorrupted PLCs and can be used to detect the corrupted PLCs and the compromised state. We use OpenPLC software to simulate Legacy PLC system on Raspberry Pi and show İ/O\$ pin configuration attack on digital and pulse width modulation (PWM) pins. We describe the protocol using a small prototype of five instances of legacy PLCs simultaneously running on OpenPLC software. We show that when our proposed protocol is deployed, the aforementioned attacks get successfully detected and the controller takes corrective measures. This work has been developed as a part of the problem statement given in the Cyber Security Awareness Week-2017 competition.