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2020. Exploiting Dual-Rail Register Invariants for Equivalence Verification of NCL Circuits. 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS). :21–24.
Equivalence checking is one of the most scalable and useful verification techniques in industry. NULL Convention Logic (NCL) circuits utilize dual-rail signals (i.e., two wires to represent one bit of DATA), where the wires are inverses of each other during a DATA wavefront. In this paper, a technique that exploits this invariant at NCL register boundaries is proposed to improve the efficiency of equivalence verification of NCL circuits.