| Title | Lightweight Security Data Streaming, Based on Reconfigurable Logic, for FPGA Platform |
| Publication Type | Conference Paper |
| Year of Publication | 2020 |
| Authors | Tsavos, Marios, Sklavos, Nicolas, Alexiou, George Ph. |
| Conference Name | 2020 23rd Euromicro Conference on Digital System Design (DSD) |
| Date Published | Aug. 2020 |
| Publisher | IEEE |
| ISBN Number | 978-1-7281-9535-3 |
| Keywords | Ciphers, Clocks, cryptography, cyber security, field programmable gate arrays, FPGA, hardware security, Lightweight, Lightweight Ciphers, pubcrawl, Reconfigurable Logic, Registers, resilience, Resiliency, Scalability, stream ciphers |
| Abstract | Alongside the rapid expansion of Internet of Things (IoT), and network evolution (5G, 6G technologies), comes the need for security of higher level and less hardware demanding modules. New cryptographic systems are developed, in order to satisfy the special needs of security, that have emerged in modern applications. In this paper, a novel lightweight data streaming system, is proposed, which operates in alternative modes. Each one of them, performs efficiently as one of three in total, stream ciphering modules. The operation of the proposed system, is based on reconfigurable logic. It aims at a lower hardware utilization and good performance, at the same time. In addition, in order to have a fair and detailed comparison, a second one design is also integrated and introduced. This one proposes a conventional architecture, consisting of the same three stream ciphering modes, implemented on the same device, as separate operation modules. The FPGA synthesis results prove that the proposed reconfigurable design achieves to minimize the area resources, from 18% to 30%, compared to the conventional one, while maintaining high performance values, for the supported modes. |
| URL | https://ieeexplore.ieee.org/document/9217854 |
| DOI | 10.1109/DSD51259.2020.00052 |
| Citation Key | tsavos_lightweight_2020 |
Lightweight Security Data Streaming, Based on Reconfigurable Logic, for FPGA Platform