ESLsyn 2015

The 2015 Electronic System Level Synthesis Conference (ESLsyn 2015)

(in conjunction with DAC)

General Chair: Jorn Janneck, Lund University, Sweden
Co-Chair: Achim Rettberg, Hella KGaA, Germany

The Electronic System Level Synthesis Conference focuses on automated system design methods that enable efficient modelling, synthesis, exploration and verification of systems from high-level specifications down to lower level implementations.

ESLsyn will focus on the five key tasks related to the design and verification of complex, programmable electronic products (but not limited to):

• The development of product architectures and specifications, including the incorporation and configuration of IP
• The mapping of applications onto a product platform, including hardware/software partitioning and processor optimization (High-Level Synthesis)
• The creation of pre-silicon, virtual hardware platforms for software development
• The automated synthesis of hardware and software implementations for a given architecture
• The development of formal methods for verifying hardware and software

Within this scope, ESLsyn addresses:

• Cyber-Physical and Embedded Systems/Platforms related to ESL design flows
• High-Level/Behavioral/Architectural Synthesis for hardware design in cooperation with ESL design flows
• Embedded Hardware and Software Synthesis that is used as part of ESL design flows

For additional information and sponsorship opportunities, please visit us at ESLsyn website.