CFP: 22nd IEEE Real-Time Embedded Technology & Applications Symposium (RTAS)

22nd IEEE Real-Time Embedded Technology & Applications Symposium (RTAS)

part of the 2016 Cyber-Physical Systems Week (CPSWeek) | April 11-14, 2016 | Vienna, Austria

RTAS'16 invites papers describing original systems and applications, case studies, methodologies and applied algorithms that contribute to the state of practice in the broad field of embedded and open real-time systems and computing. The scope of RTAS'16 will consist of three tracks: (1) Applications, RTOSs and Run-Time Software and Tools, (2) Applied Methodologies and Foundations, and (3) Embedded Systems Design for Real-Time Applications.

Track 1: Applications, RTOSs, Run-Time Software and Tools.

This track focuses on applications, tools, and run-time software for real-time systems. Relevant areas include, but are not limited to, real-time operating systems, middleware, system utilities, and case studies. Papers submitted to this track should focus on specific systems and implementations. Authors must introduce the application context and clearly define motivating application examples. The papers must also introduce the related research challenges, illustrate the theoretical foundations, and explain the method used in the evaluation. Authors must include a section with experimental results performed on a real implementation, or demonstrate applicability to an industrial case study or working system. The experiment or case study discussions must highlight problems and bottlenecks encountered in the implementation. Simulation-based results are acceptable only if the authors clearly motivate why it is not possible to develop a real system. Submissions that do not consider real-time requirements will not be accepted.

Track 2: Applied Methodologies and Foundations.

This track focuses on basic methodologies, algorithms, and analyses that are applied to real systems to solve specific problems. Papers failing to address applicability as defined in the following guidelines will not be considered as acceptable. Authors must introduce the application context and clearly define motivating application examples. The system models and any assumptions used in the derivation of the results must be applicable to real systems and reflect actual needs. Papers must include a section on experimental results, preferably on real case studies or models of real systems, although the use of synthetic workloads and models is acceptable if appropriately motivated. Submissions that do not consider real-time requirements will not be accepted.

Track 3: Embedded Systems Design for Real-Time Applications.

This track focuses on hardware/software co-design, integration methodologies, design-time tools and architectures for modern embedded systems for real-time applications. General topics relevant to this track include, but are not limited to, architecture description languages and tools, WCET analysis, software and hardware architectures, design space exploration, synthesis and optimization. Of special interest are SoC design for real-time applications, special purpose functional units, specialized memory structures, multi-core chips and communication aspects, FPGA simulation and prototyping, software simulation and compilation for novel architectures and applications, as well as power, timing and predictability analyses. Papers must include a section on experimental results, preferably on real case studies or models of real systems, although the use of synthetic workloads and models is acceptable if appropriately motivated. Submissions that do not consider real-time requirements will not be accepted.

SUBMISSION OF PAPERS

All papers must be submitted electronically in PDF format, following the IEEE conference proceedings format and must describe original work not previously published or concurrently submitted elsewhere. The main body of each submitted paper is limited to 10 pages. Additionally, each submission may include an optional appendix with supplemental material that will be read at the discretion of the program committee; this appendix is limited to two pages (for 12 pages total). Authors of accepted papers that exceed 10 pages (due to the inclusion of an optional appendix) will be required to pay a fee of $50 for each page beyond the tenth. A submission based on previous work presented in a workshop with no digital object identifier (DOI) is eligible for acceptance. Submissions based on a previous paper published in a workshop proceedings having a DOI are eligible for acceptance, provided they contain at least 30% of new material.

The submission deadline is 23:59 GMT - 12:00 on 15 October 2015.

Before submitting your paper, please ensure that you read the important information for authors.

Please submit your papers at https://www.softconf.com/e/rtas2016/

IMPORTANT DATES

• Paper Submission Deadline (FIRM) - 23:59 (GMT-12) October 15th, 2015
• Acceptance Notification - December 14th, 2015 (Tentative)
• Camera-ready versions - January 15th, 2016 (Tentative)
• Conference - April 11th-14th, 2016