Visible to the public  Call for Papers: 8th International Workshop on Dependable Many-Core Computing (DMCC 2016)Conflict Detection Enabled

No replies
Anonymous
Anonymous's picture

CALL FOR PAPERS AND PARTICIPATION

The 8th International Workshop on Dependable Many-Core Computing (DMCC 2016)

As part of The International Conference on High Performance Computing & Simulation (HPCS 2016)

http://hpcs2016.cisedu.info or http://cisedu.us/rp/hpcs16 | July 18 - July 22, 2016
The University of Innsbruck | Innsbruck, Austria


Submission Deadline: March 07, 2016

Submissions could be for full papers, short papers, poster papers, or posters


SCOPE AND OBJECTIVES

Computing systems with a large number of processing units are increasingly common, both in the form of processors employing multiple execution cores (e.g., multi-core CPUs, GPUs), or computing clusters with a large number of nodes. These many-core architectures bring up new capabilities, opportunities, as well as challenges. As the number of cores increases, so does the probability to have faults, both due to hardware issues (e.g., physical defects introduced during fabrication), software problems (e.g., a single crashed process bringing down the whole computation) or communication issues in the network infrastructure.

This workshop focuses on software and/or hardware solutions to dependability and fault-tolerance in multi- and many-core systems.

The DMCC Workshop topics of interest include (but are not limited to) the following:

  • Dependable/Fault-Tolerant Many-Core Architectures
  • Power-Aware Many-Core Design
  • Dependable & Secure Many-Core Designs
  • Many-Core Development and Design Tools
  • Dependability and Fault Tolerance in Simulation
  • System-Level Many-Core Implementation
  • Many-Core Interconnect Technology
  • Many-Core System-On-Chip Development
  • Reconfigurable Computing and FPGAs
  • Design for Testing
  • Hardware and Software Debug Facilities
  • Many-Core Programming and Optimization for Dependability
  • Application Partitioning and Load Balancing
  • Hypervisors and Virtual Machine Technology
  • Trusted and Untrusted Environments
  • Virtualization for Dependability
  • Dependability through Multi-Threading / Multi-Processing
  • Fault Detection Techniques
  • Fault-Tolerant Software Design
  • Fault-Tolerant Hardware Design
  • Fault-Tolerant HW/SW Co-Design
  • Modeling and Simulation of Dependable and Fault Tolerant Systems
  • Formal Techniques for Dependable Hardware/Software Design

INSTRUCTIONS FOR PAPER SUBMISSIONS:

You are invited to submit original and unpublished research works on above and other topics related to dependable and resilient many-core computing systems. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2016.cisedu.info/1-call-for-papers/call-for-posters for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments.

Submit a PDF copy of your full manuscript to the workshop paper submission EasyChair site at https://easychair.org/conferences/?conf=dmcc2016. Acknowledgement will be sent within 48 hours of submission.

Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2016 conference to present the paper at the workshop.

Proceedings

Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2016 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE Digital Library and indexed in all major indexing services accordingly.

If you have any questions about paper submission or the workshop, please contact the workshop organizers.

IMPORTANT DATES

  • Paper Submissions: ------------------------------------ March 07, 2016
  • Acceptance Notification: ---------------------------------- April 07, 2016
  • Camera Ready Papers and Registration Due by: ------- May 01, 2016
  • Conference Dates: ---------------------------------------- July 18 - 22, 2016

WORKSHOP ORGANIZERS

  • Diana Gohringer - Ruhr-University Bochum (RUB), Germany
    Email: diana.goehringer@ruhr-uni-bochum.de
  • Thomas Hollstein - Tallinn University of Technology (TUT), Estonia
    Email: thomas@ati.ttu.ee

International Program Committee:

All submitted papers will be rigorously reviewed by the workshop technical program committee members following similar criteria used in HPCS 2016 and will be published as part of the HPCS 2016 Proceedings.

  • Juergen Becker, Karlsruhe Institute of Technology, Germany
  • Masoud Daneshtalab, KTH Royal Institute of Technology, Sweden
  • Masoumeh Ebrahimi, KTH Royal Institute of Technology, Sweden
  • Michael Huebner, Ruhr-University Bochum, Germany
  • Gert Jervan, Tallinn University of Technology, Estonia
  • Fernando Moraes, Pontificia Universidade Catolica do Rio Grande do Sul (PUCRS), Porto Alegre, Brazil
  • Maurizio Palesi, Kore University, Italy
  • Juha Plosila, University of Turku, Finland
  • Gerard Rauwerda, Recore Systems, The Netherlands
  • Mario Scholzel, IHP GmbH, Germany
  • Sascha Uhrig, Airbus Defense and Space GmbH, Germany
  • Theo Vierhaus, TU Cottbus, Germany
  • TBA, TBA

(* Committee formation is pending and will be finalized shortly.)