Visible to the public Biblio

Filters: Author is Tian, Jianwei  [Clear All Filters]
2020-10-14
Song, Yufei, Yu, Zongchao, Liu, Xuan, Tian, Jianwei, CHEN, Mu.  2019.  Isolation Forest based Detection for False Data Attacks in Power Systems. 2019 IEEE Innovative Smart Grid Technologies - Asia (ISGT Asia). :4170—4174.
Power systems become a primary target of cyber attacks because of the vulnerability of the integrated communication networks. An attacker is able to manipulate the integrity of real-time data by maliciously modifying the readings of meters transmitted to the control center. Moreover, it is demonstrated that such attack can escape the bad data detection in state estimation if the topology and network information of the entire power grid is known to the attacker. In this paper, we propose an isolation forest (IF) based detection algorithm as a countermeasure against false data attack (FDA). This method requires no tedious pre-training procedure to obtain the labels of outliers. In addition, comparing with other algorithms, the IF based detection method can find the outliers quickly. The performance of the proposed detection method is verified using the simulation results on the IEEE 118-bus system.
2020-01-21
Li, Shu, Tian, Jianwei, Zhu, Hongyu, Tian, Zheng, Qiao, Hong, Li, Xi, Liu, Jie.  2019.  Research in Fast Modular Exponentiation Algorithm Based on FPGA. 2019 11th International Conference on Measuring Technology and Mechatronics Automation (ICMTMA). :79–82.
Modular exponentiation of large number is widely applied in public-key cryptosystem, also the bottleneck in the computation of public-key algorithm. Modular multiplication is the key calculation in modular exponentiation. An improved Montgomery algorithm is utilized to achieve modular multiplication and converted into systolic array to increase the running frequency. A high efficiency fast modular exponentiation structure is developed to bring the best out of the modular multiplication module and enhance the ability of defending timing attacks and power attacks. For 1024-bit key operands, the design can be run at 170MHz and finish a modular exponentiation in 4,402,374 clock cycles.