Biblio

One of the critical threats menacing the Cooperative Spectrum Sensing (CSS) in Cognitive Radio Networks (CRNs) is the Spectrum Sensing Data Falsification (SSDF) reports, which can deceive the decision of Fusion Center (FC) about the Primary User (PU) spectrum accessibility. In CSS, each CR user performs Energy Detection (ED) technique to detect the status of licensed frequency bands of the PU. This paper investigates the performance of different hard-decision fusion schemes (OR-rule, AND-rule, and MAJORITY-rule) in the presence of Always Yes and Always No Malicious User (AYMU and ANMU) over Rayleigh and Gaussian channels. More precisely, comparative study is conducted to evaluate the impact of such malicious users in CSS on the performance of various hard data combining rules in terms of miss detection and false alarm probabilities. Furthermore, computer simulations are carried out to show that the hard-decision fusion scheme with MAJORITY-rule is the best among hard-decision combination under AYMU attacks, OR-rule has the best detection performance under ANMU.

In network communication domain, one of the most widely used protocol for encrypting data and securing communications is the IPSec protocol. The design of this protocol is based on two main phases which are: exchanging keys phase and transferring data phase. In this paper we focus on enhancing the exchanging keys phase which is included in the security association (SA), using a chaotic cryptosystem. Initially IPSec is based on the Internet Key Exchange (IKE) protocol for establishing the SA. Actually IKE protocol is in charge for negotiating the connection and for authenticating both nodes. However; using IKE gives rise to a major problem related to security attack such as the Man in the Middle Attack. In this paper, we propose a chaotic cryptosystem solution to generate SA file for the connected nodes of the network. By solving a 4-Dimension chaotic system, a SA file that includes 128-bit keys will be established. The proposed solution is implemented and tested using FPGA boards.