Biblio
Filters: Author is Brazhnikov, S. [Clear All Filters]
.
2020. A Hardware Implementation of the SHA2 Hash Algorithms Using CMOS 28nm Technology. 2020 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (EIConRus). :1784–1786.
This article presents a hardware implementation review of a popular family of hash algorithms: Secure Hash Algorithm 2 (SHA2). It presents various schematic solutions and their assessments for 28 nm CMOS technology. Using this paper we can estimate the expected performance of the hardware hash accelerator based on the IC.