Visible to the public Biblio

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2022-03-01
Sarihi, Amin, Patooghy, Ahmad, Hasanzadeh, Mahdi, Abdelrehim, Mostafa, Badawy, Abdel-Hameed A..  2021.  Securing Network-on-Chips via Novel Anonymous Routing. 2021 15th IEEE/ACM International Symposium on Networks-on-Chip (NOCS). :29–34.
Network-on-Chip (NoC) is widely used as an efficient communication architecture in multi-core and many-core System-on-Chips (SoCs). However, the shared communication resources in NoCs, e.g., channels, buffers, and routers might be used to conduct attacks compromising the security of NoC-based SoCs. Almost all of the proposed encryption-based protection methods in the literature need to leave some parts of the packet unencrypted to allow the routers to process/forward packets accordingly. This uncovers the source/destination information of the packet to malicious routers, which can be used in various attacks. In this paper, we propose the idea of secure anonymous routing with minimal hardware overhead to hide the source/destination information while exchanging secure information over the network. The proposed method uses a novel source-routing algorithm that works with encrypted destination addresses and prevents malicious routers from discovering the source/destination of secure packets. To support our proposal, we have designed and implemented a new NoC architecture that works with encrypted addresses. The conducted hardware evaluations show that the proposed security solution combats the security threats at an affordable cost of 1% area and 10% power overheads chip-wide.
2020-11-02
Sengupta, Anirban, Chandra, N. Prajwal, Kumar, E. Ranjith.  2019.  Robust Digital Signature to Protect IP Core against Fraudulent Ownership and Cloning. 2019 IEEE 9th International Conference on Consumer Electronics (ICCE-Berlin). :1—3.

Digital signal processing (DSP) and multimedia based reusable Intellectual property (IP) cores form key components of system-on-chips used in consumer electronic devices. They represent years of valuable investment and hence need protection against prevalent threats such as IP cloning and fraudulent claim of ownership. This paper presents a novel crypto digital signature approach which incorporates multiple security modules such as encryption, hashing and encoding for protection of digital signature processing cores. The proposed approach achieves higher robustness (and reliability), in terms of lower probability of coincidence, at lower design cost than existing watermarking approaches for IP cores. The proposed approach achieves stronger proof of authorship (on average by 39.7%) as well as requires lesser storage hardware compared to a recent similar work.

2018-02-02
Tayeb, S., Pirouz, M., Latifi, S..  2017.  A Raspberry-Pi Prototype of Smart Transportation. 2017 25th International Conference on Systems Engineering (ICSEng). :176–182.

This paper proposes a prototype of a level 3 autonomous vehicle using Raspberry Pi, capable of detecting the nearby vehicles using an IR sensor. We make the first attempt to analyze autonomous vehicles from a microscopic level, focusing on each vehicle and their communications with the nearby vehicles and road-side units. Two sets of passive and active experiments on a pair of prototypes were run, demonstrating the interconnectivity of the developed prototype. Several sensors were incorporated into an emulation based on System-on-Chip to further demonstrate the feasibility of the proposed model.

2017-12-12
Contreras, G. K., Nahiyan, A., Bhunia, S., Forte, D., Tehranipoor, M..  2017.  Security vulnerability analysis of design-for-test exploits for asset protection in SoCs. 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC). :617–622.

SoCs implementing security modules should be both testable and secure. Oversights in a design's test structure could expose internal modules creating security vulnerabilities during test. In this paper, for the first time, we propose a novel automated security vulnerability analysis framework to identify violations of confidentiality, integrity, and availability policies caused by test structures and designer oversights during SoC integration. Results demonstrate existing information leakage vulnerabilities in implementations of various encryption algorithms and secure microprocessors. These can be exploited to obtain secret keys, control finite state machines, or gain unauthorized access to memory read/write functions.