The production of computer chips has universally moved offshore in recent years, reducing design complexity and fabrication cost. But these benefits come at the expense of security: An attack anywhere along the supply chain can insert malicious components into an integrated circuit, pirate its design or counterfeit it. These attacks, which are exceedingly difficult to detect, jeopardize the computer industry, undermine national security, and put critical infrastructure in danger. More than a decade of research in hardware security has resulted in a plethora of solutions for these problems, but many of these solutions address specific attack models and, hence, are not universally applicable. This project breaks this barrier by developing hardware design approaches that are both provably secure and applicable across the entire hardware industry for differing businesses and threat models. To engage and teach the next generation of cybersecurity experts, the project uses puzzle-, challenge-, and competition-based educational and outreach activities at the high-school, undergraduate, and graduate levels. The project has three components. First, the research develops a secure synthesis approach to prevent piracy and reverse engineering using provably-secure camouflaging and logic encryption, where the attacker is provided with only partial knowledge of the design to obfuscate the design intent. Second, the research analyzes the security implications of untrusted test facilities by demonstrating an attack to compromise secrets through test data. It develops a provably-secure test pattern generation technique for testing chips with secrets. Third, this project designs chips such that any (malicious) alterations and counterfeits are provably-detected by existing techniques.
Continuation of Award #: 1652842
CAREER: Towards Provably-Secure Design of Integrated Circuits