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Modern high-performance processors implement complex microarchitectural optimizations involving speculative execution which has recently been shown to be vulnerable to a type of malicious attack called Spectre. This project will investigate a microarchitectural solution framework to secure against such attacks. This framework, called context-sensitive fencing, will seek to automatically track and detect malicious execution patterns dynamically to trigger defense code without programmer intervention and with minimal impact on processor performance.
This research will investigate a high performance defense strategy with three novel components: (a) secure microcode customization which leverages the processor's microcode engine to enable the surgical injection of Spectre defense code (e.g., speculation fences) into the dynamic instruction stream without the need for software patching, (b) a decoder-level information flow tracking framework which detects spurious execution patterns that result in the mis-training of core microprocessor structures such as the branch predictor, and (c) microarchitecture hardening mechanisms that shield sensitive microarchitectural structures against the malicious side effects of speculative execution, to further enable a security-aware processor architecture design.
The reconfigurable microcode-level defense proposed by this research may address the Spectre attack which affects millions of users. This project will train and mentor graduate and undergraduate students and is expected to facilitate development of a hardware security course to be delivered in-class and online.
The results from this research will be disseminated in the form of publications, presentations, design reports, course materials, and source code, and will be hosted publicly for the length of this project and beyond, on the investigator's website at http://www.cs.virginia.edu/venkat.
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CRII: SaTC: Mitigating Software-Based Microarchitectural Attacks via Secure Microcode Customization