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Digital information has become an integral part of our daily lives and there is a growing concern about the security of information. The amount of information that should be kept secure is increasing with the proliferation of high-tech electronics such as smart-phones, tablets, and wearable devices. Accordingly, the number of attacks from malicious parties to obtain the secret information that is stored in a secure (i.e., encrypted) device increases. Side-channel attacks are widely used to extract information from an integrated circuit (IC) or a smart card by observing different leakage sources such as power consumption, timing information, temperature, electromagnetic (EM) emanations, and acoustic waves while loading/executing/storing information. Due to the low cost and potentially non-invasive nature, side-channel attacks pose a serious threat to the security of personal, commercial, and military information. By providing design guidelines against side-channel attacks, our project benefits companies, governments, and individuals in securing the digital information.
This project investigates the power and feasibility of combined side-channel attacks including both physical side-channel attacks (i.e., power, timing, and electromagnetic) and fault injection attacks. Since each attack vector leverages a different leakage mechanism, the countermeasures against different attack vectors may differ significantly. Accordingly, mathematical foundations of combined countermeasures against multiple attack vectors are developed. In this project, the existing resources are utilized as a countermeasure against combined attacks together with dedicated countermeasures to minimize the energy and performance overheads of security. This project provides several opportunities to underrepresented groups and undergraduate students to engage in hardware security research.
Continuation of Award #: 1715286
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SaTC: STARSS: Small: Combined Side-channel Attacks and Mathematical Foundations of Combined Countermeasures