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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Look Up Tables (LUTs)
biblio
A Design Implementation and Comparative Analysis of Advanced Encryption Standard (AES) Algorithm on FPGA
Submitted by grigby1 on Wed, 09/01/2021 - 1:14pm
Advanced Encryption Standard (AES) Algorithm
Artix-7 FPGA
encryption
field programmable gate arrays
Field Programmable Gate Arrays (FPGA)
Hardware
i-o systems security
Input/Output (I/O) and Global Buffer (BUFG)
Look Up Tables (LUTs)
pubcrawl
Registers
Scalability
Slice Register (SR)
standards
Table lookup
