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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Trace buffer
biblio
Security Capsules: An Architecture for Post-Silicon Security Assertion Validation for Systems-on-Chip
Submitted by grigby1 on Tue, 03/01/2022 - 4:18pm
post-silicon validation
Very large scale integration
Trace buffer
system-on-chip
Scalability
Run-time security monitors
Resiliency
resilience
pubcrawl
Program processors
dynamic systems
network on chip security
Monitoring
Metrics
IP networks
Heuristic algorithms
Dynamic signal selection
computer architecture
composability
security
