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Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

multiple-choice hash tables

biblio

Visible to the public Maximizing the Throughput of Hash Tables in Network Devices with Combined SRAM/DRAM Memory

Submitted by BrandonB on Wed, 05/06/2015 - 12:01pm
  • Maximum matching
  • Throughput
  • system-on-chip
  • SRAM chips
  • random bipartite graph
  • Random access memory
  • performance evaluation
  • network devices
  • multiple-choice hash tables
  • memory speed difference
  • Memory management
  • average lookup time
  • Internet backbone traces
  • internet
  • hash table throughput maximization
  • graph theory
  • fixed left-side vertex degree
  • DRAM chips
  • data structures
  • combined SRAM/DRAM memory model
  • combined SRAM-DRAM memory
  • Bipartite graph

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