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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
DRAM chips
biblio
PAIR: Pin-aligned In-DRAM ECC architecture using expandability of Reed-Solomon code
Submitted by aekwall on Mon, 03/22/2021 - 1:09pm
In-DRAM ECC
Resiliency
Reliability
Reed-Solomon codes
Reed-Solomon code
pubcrawl
process scaling
pin-aligned In-DRAM ECC architecture
performance degradation
PAIR
numerous inherent faults
In-DRAM Error Correcting Code
Compositionality
expandability
error correction codes
error correction
ECC codewords
DRAM vendors
DRAM chips
DRAM
DQ pin lines
density
computer systems
biblio
Memway: in-memorywaylaying acceleration for practical rowhammer attacks against binaries
Submitted by grigby1 on Fri, 10/30/2020 - 12:15pm
Scalability
page cache eviction
parallel processing
powerful privilege-escalation attacks
program diagnostics
proof-of-concept Waylaying algorithm
pubcrawl
Random access memory
rowhammer attacks
Rowhammer bug
running time
microarchitectural security threat
security
security of data
system memory
system monitoring
time 15.0 min to 200.0 min
unprivileged instructions
unprivileged posix fadvise API
victim binary
Waylaying algorithm
Waylaying method
I-O Systems
application program interfaces
binary relocation step
cache storage
Computer bugs
disk
DRAM chips
Dynamic Random Access Memory cells
exploitable physical addresses
Hardware
Heuristic algorithms
advanced Memway algorithm
i-o systems security
in-memory swapping
in-memory waylaying acceleration
input-output programs
Kernel
Linux
Linux page cache
Linux tmpfs
mainstream platforms
Memway+fadvise relocation scheme
biblio
Locking Secret Data in the Vault Leveraging Fuzzy PUFs
Submitted by aekwall on Mon, 04/06/2020 - 10:05am
physical unclonable functions
Human behavior
inherent sensitivity
locking secret data
low-cost security anchor
manufacturing variations
nanoscale variations
pattern locks
Phase measurement
helper data algorithm
prominent intrinsic PUF
Proposals
pubcrawl
Random access memory
Reliability
secret important data
secure environment
security scheme
enrollment phase
Resiliency
Metrics
Fuzzy Cryptography
aging sensitivity
Cryptography
data algorithms
DRAM chips
DRAM PUF
Scalability
error correction
error-correction algorithm
error-tolerant
fuzzy pattern
fuzzy PUF
fuzzy set theory
Hardware
biblio
Peapods: OS-Independent Memory Confidentiality for Cryptographic Engines
Submitted by aekwall on Mon, 12/02/2019 - 12:08pm
code fragments
compiler security
user-mode protection
Transactional memory
software engines
sensitive variables
Peapods
OS-independent memory confidentiality
memory disclosure attacks
memory disclosure attack
DRAM chips
cryptographic keys
Cryptographic Implementation
cryptographic engines
confidentiality
compiler
Scalability
automatic protection
program compilers
Registers
Compositionality
operating systems (computers)
Engines
Random access memory
OS kernel
Data protection
Metrics
pubcrawl
Resiliency
Kernel
encryption
Cryptography
biblio
Unreliable memory operation on a convolutional neural network processor
Submitted by grigby1 on Thu, 06/07/2018 - 3:06pm
Reliability
Kernel
Memory management
MNIST dataset
neural nets
Neural Network Resilience
power aware computing
pubcrawl
Random access memory
inference capabilities
resilience
Resiliency
severe fault-injection rates
size 28.0 nm
software fault tolerance
storage management chips
Training
unreliable memory operation
embedded dynamic RAM system
bit-cells
classification challenges
CNN resilience
convolutional neural network processor
data elements
Degradation
detection challenges
DRAM chips
bit protection
embedded systems
error probability degradation
fault diagnosis
fault mitigation strategies
fault tolerance
fault tolerant computing
feature maps memory space
hardware memories
biblio
Hiding the Long Latency of Persist Barriers Using Speculative Execution
Submitted by grigby1 on Wed, 05/09/2018 - 2:56pm
resilience
nonvolatile memory technology
NVMM
pcommit
performance bottleneck
performance overhead
persist barriers
persistence instructions
policy-based governance
Policy-Governed Secure Collaboration
pubcrawl
Random access memory
random-access storage
Nonvolatile memory
Resiliency
Safe Coding
Safety
significant execution time overhead
Software
speculative execution
Speculative Persistence
speculative persistence architecture
storage management
substantial performance boost
volatile caches
fail-safe code
checkpoint-based processing
checkpointing
clflushopt
clwb
collaboration
common data structures
consistent state
data structures
DRAM
DRAM chips
expensive fence operations
cache storage
Failure Safety
file system
Force
Human Factors
logging based transactions
long latency persistency operations
Metrics
modern systems reorder memory operations
non-volatile main memory
nonpersistent implementations
NonVolatile Main Memory
biblio
Maximizing the Throughput of Hash Tables in Network Devices with Combined SRAM/DRAM Memory
Submitted by BrandonB on Wed, 05/06/2015 - 12:01pm
Maximum matching
Throughput
system-on-chip
SRAM chips
random bipartite graph
Random access memory
performance evaluation
network devices
multiple-choice hash tables
memory speed difference
Memory management
average lookup time
Internet backbone traces
internet
hash table throughput maximization
graph theory
fixed left-side vertex degree
DRAM chips
data structures
combined SRAM/DRAM memory model
combined SRAM-DRAM memory
Bipartite graph
biblio
On Adding Bloom Filters to Longest Prefix Matching Algorithms
Submitted by BrandonB on Wed, 05/06/2015 - 11:52am
Routing
longest prefix matching
Memory management
multihashing
parallel multiple-hashing algorithm
parallel-multiple hashing algorithm
performance evaluation
PMH algorithm
prefix matching algorithms
router
level algorithm
Routing protocols
SRAM
SRAM chips
static random access memory
System-on-a-chip
TCAM technology
ternary content addressable memory technology
wire-speed packet forwarding
Generators
binary search on levels
Bloom filter
Bloom filters
data structures
DRAM
DRAM chips
dynamic random access memory
fast parallel matching
binary search
hardware architectures
Indexes
internet
Internet Protocol
Internet routers
IP address lookup
IP networks
leaf pushing
biblio
Post-Mortem Memory Analysis of Cold-Booted Android Devices
Submitted by BrandonB on Mon, 05/04/2015 - 1:11pm
forensic memory dumps
Volatility Plugins
tablet PCs
smart phones
Random access memory
post-mortem memory analysis
Post-mortem Analysis
open-source volatility plugins
mobile computing
Memory Analysis
Linux
Kernel
full disk encryption
FROST tool
Forensics
Android Forensics
DRAM remanence effect
DRAM chips
digital investigation process
Digital Forensics
Dalvik VM memory structures
Dalvik VM
Cryptography
cold-booted Android devices
cold boot attacks
Cold Boot Attack
application level memory
Androids
Android-driven smartphones
Android memory structures
biblio
Memory Trace Oblivious Program Execution
Submitted by Heather Lucas on Wed, 09/17/2014 - 6:46pm
Oblivious RAM
variable partitioning
type system
Semantics
Random access memory
programming language techniques
program verification
program diagnostics
program compilers
probing memory buses
physical control
physical attacks
physical access
ORAM banks
optimal efficiency
arrays
memory trace oblivious program execution
memory access traces
memory access overhead
formal security
encryption
DRAM chips
Cryptography
computing platform
computing infrastructure
compiler
cold-boot style attacks
cloud service providers
Cloud Computing
