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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
multiple RRAM cells
biblio
A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation
Submitted by grigby1 on Mon, 11/20/2017 - 12:28pm
security
resilience
Resiliency
resistive RAM
resistive random access memory
RRAM
RRAM arrays
RRAM PUF instances
RRAM PUF properties
RRAM PUF resistance
Reliability
self-destructive feature
split reference
split S/A
split sense amplifier
Tamper resistance
tamper-resistant design
tamper-resistant RRAM PUF
top-level interconnect
uniqueness
invasive tampering
Decoding
dummy cells
extrapolation
Hardware
hardware overhead
Hardware Security
HD
inter-Hamming distance
interconnect layers
composability
layout obfuscation
layout obfuscation scheme
Logic arrays
multiple RRAM cells
Physical Unclonable Function
pubcrawl
PUF
relaxing transistor