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National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

elliptic curve cryptographic combinational logic circuits

biblio

Visible to the public Evolving side-channel resistant reconfigurable hardware for elliptic curve cryptography

Submitted by grigby1 on Tue, 12/12/2017 - 1:25pm
  • Metrics
  • Xilinx Kintex-7 FPGA
  • timing attacks
  • side-channel resistant reconfigurable hardware
  • side-channel attacks
  • security-level
  • Scalability
  • Resiliency
  • reconfigurable hardware design
  • public-key cryptosystems
  • public key cryptography
  • pubcrawl
  • propagation delay minimization
  • power analysis attacks
  • noninvasive side channel attacks
  • minimisation
  • Algorithm design and analysis
  • Hardware
  • genetic algorithms
  • genetic algorithm
  • fitness function
  • field programmable gate arrays
  • Evolutionary algorithm
  • Elliptic curves
  • elliptic curve discrete logarithm
  • Elliptic curve cryptography
  • elliptic curve cryptographic hardware
  • elliptic curve cryptographic combinational logic circuits
  • Cryptographic Protocols
  • cryptographic applications
  • combinational circuits
  • circuit size minimization

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