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National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

low-latency hardware

biblio

Visible to the public On-chip Data Security Against Untrustworthy Software and Hardware IPs in Embedded Systems

Submitted by aekwall on Wed, 05/01/2019 - 12:42pm
  • security of data
  • memory security
  • Metrics
  • microprocessor chips
  • on-chip memory blocks
  • pubcrawl
  • reconfigurable logic fabric
  • Resiliency
  • security
  • memory protection unit
  • security services
  • SoC FPGA
  • software IP
  • static detection methods
  • system-on-chip
  • third-party IP cores
  • third-party IPs
  • 3PIP
  • memory protection design
  • memory access
  • low-latency hardware
  • IP networks
  • Intel DE1-SoC board
  • implementation
  • hierarchical top-down structure
  • Hardware
  • golden reference model
  • FPGA-based embedded systems
  • field programmable gate arrays
  • embedded systems
  • dual-core ARM processor
  • Cryptography
  • composability

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