Skip to Main Content Area
  • CPS-VO
    • Contact Support
  • Browse
    • Calendar
    • Announcements
    • Repositories
    • Groups
  • Search
    • Search for Content
    • Search for a Group
    • Search for People
    • Search for a Project
    • Tagcloud
      
 
Not a member?
Click here to register!
Forgot username or password?
 
Home
National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

Instruction-Level Abstraction

biblio

Visible to the public Formal Security Verification of Concurrent Firmware in SoCs Using Instruction-Level Abstraction for Hardware*

Submitted by grigby1 on Tue, 12/17/2019 - 12:21pm
  • resilience
  • Metrics
  • microprocessor chips
  • Microprogramming
  • multi-threading
  • multithreaded program verification problem
  • Predictive Metrics
  • program verification
  • pubcrawl
  • intellectual property security
  • Resiliency
  • Secure Boot design
  • security of data
  • SoC security verification
  • software verification techniques
  • system-on-chip
  • Systems-on-Chip
  • cyber-physical systems
  • architecture level
  • bit-precise reasoning
  • cognition
  • composability
  • Concurrency
  • concurrency (computers)
  • concurrent firmware
  • cyber-physical system
  • Access Control
  • firmware
  • firmware-visible behavior
  • formal security verification
  • Frequency modulation
  • Hardware
  • Instruction-Level Abstraction
  • intellectual property blocks

Terms of Use  |  ©2023. CPS-VO