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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
intellectual property blocks
biblio
Formal Security Verification of Concurrent Firmware in SoCs Using Instruction-Level Abstraction for Hardware*
Submitted by grigby1 on Tue, 12/17/2019 - 12:21pm
resilience
Metrics
microprocessor chips
Microprogramming
multi-threading
multithreaded program verification problem
Predictive Metrics
program verification
pubcrawl
intellectual property security
Resiliency
Secure Boot design
security of data
SoC security verification
software verification techniques
system-on-chip
Systems-on-Chip
cyber-physical systems
architecture level
bit-precise reasoning
cognition
composability
Concurrency
concurrency (computers)
concurrent firmware
cyber-physical system
Access Control
firmware
firmware-visible behavior
formal security verification
Frequency modulation
Hardware
Instruction-Level Abstraction
intellectual property blocks
biblio
MUTARCH: Architectural diversity for FPGA device and IP security
Submitted by grigby1 on Tue, 01/23/2018 - 3:24pm
policy-based governance
IP security
logical configuration keys
logic circuits
microprocessor chips
modern remote upgrade techniques
MUTARCH
physical configuration keys
Policy
IP piracy
pubcrawl
Resiliency
security through diversity principle
static keys
Table lookup
time-varying keys
Transforms
unauthorized in-field reprogramming
field programmable gate arrays
automotive systems
biomedical systems
bitstream encryption
collaboration
composability
configuration file
diverse applications
encryption
architectural diversity
FPGA device
Hardware
in-field reconfiguration
intellectual property blocks
Internet of Things
IoT
IP blocks
