Skip to Main Content Area
  • CPS-VO
    • Contact Support
  • Browse
    • Calendar
    • Announcements
    • Repositories
    • Groups
  • Search
    • Search for Content
    • Search for a Group
    • Search for People
    • Search for a Project
    • Tagcloud
      
 
Not a member?
Click here to register!
Forgot username or password?
 
Home
National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

fully parallel computation

biblio

Visible to the public Nested Pipeline Hardware Self-Organizing Map for High Dimensional Vectors

Submitted by aekwall on Mon, 03/22/2021 - 1:10pm
  • neural net architecture
  • fully parallel computation
  • high dimensional vectors
  • homogeneous modular structure
  • low-dimensional vectors
  • multiple clocks
  • nested architecture
  • nested pipeline hardware self-organizing map
  • neural chips
  • frequency 60.0 MHz
  • operable clock frequency
  • original nested SOM
  • pipeline computation
  • Self-Organizing Map
  • sequential computation
  • single vector
  • VHDL
  • weight vector update
  • Pipelines
  • FPGA
  • Hardware
  • computer architecture
  • Resiliency
  • pubcrawl
  • Neurons
  • clustering
  • Vectors
  • field programmable gate arrays
  • expandability
  • Compositionality
  • Clocks
  • pipeline processing
  • MNIST
  • self-organising feature maps
  • Self-organizing feature maps

Terms of Use  |  ©2023. CPS-VO