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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
VHDL
biblio
Efficient Serial Architecture for PRESENT Block Cipher
Submitted by aekwall on Fri, 03/03/2023 - 11:02am
lightweight cryptography
VHDL
Throughput
side-channel attacks
Scalability
Resiliency
pubcrawl
PRESENT algorithm
Power demand
Ciphers
Lightweight Ciphers
Internet of Things (IoT)
Hardware Implementation
Hardware
FPGA
encryption
cyber-physical systems
biblio
A Faster Hardware Implementation of the AES S-box
Submitted by grigby1 on Wed, 07/13/2022 - 1:12pm
pubcrawl
Resiliency
delays
Libraries
resilience
Inverters
ASIC
Scalability
Semiconductor device modeling
Minimization
mathematical models
VHDL
exponentiation
AES S-box
Composite field arithmetic
Logic-minimization heuristics
biblio
Design and Simulation of AES S-Box Towards Data Security in Video Surveillance Using IP Core Generator
Submitted by grigby1 on Tue, 05/10/2022 - 3:33pm
AES
encryption
Generators
Hardware
HEVC
Human behavior
IP networks
Metrics
pubcrawl
resilience
Resiliency
S-box
Software
VHDL
video surveillance
biblio
Automatic Test Case Generation for Prime Field Elliptic Curve Cryptographic Circuits
Submitted by grigby1 on Thu, 05/05/2022 - 2:20pm
Integrated circuit modeling
VHDL
Testbench
Scalability
Resiliency
resilience
pubcrawl
ModelSim
Metrics
composability
Generators
Galois Field Arithmetic
field programmable gate arrays
Elliptic curves
Elliptic curve cryptography
ECC Operations
Cryptography
biblio
A Secure Network Interface for on-Chip Systems
Submitted by aekwall on Thu, 09/30/2021 - 11:42am
lED
network on chip security
VHDL
Network interfaces
network interface
Multicore processing
Hardware Implementation
decryption
network-on-chip
light emitting diodes
security
Ciphers
AES
Resiliency
Metrics
Scalability
pubcrawl
encryption
tools
computer architecture
biblio
Nested Pipeline Hardware Self-Organizing Map for High Dimensional Vectors
Submitted by aekwall on Mon, 03/22/2021 - 1:10pm
neural net architecture
fully parallel computation
high dimensional vectors
homogeneous modular structure
low-dimensional vectors
multiple clocks
nested architecture
nested pipeline hardware self-organizing map
neural chips
frequency 60.0 MHz
operable clock frequency
original nested SOM
pipeline computation
Self-Organizing Map
sequential computation
single vector
VHDL
weight vector update
Pipelines
FPGA
Hardware
computer architecture
Resiliency
pubcrawl
Neurons
clustering
Vectors
field programmable gate arrays
expandability
Compositionality
Clocks
pipeline processing
MNIST
self-organising feature maps
Self-organizing feature maps
biblio
Self-Healing Approach for Hardware Neural Network Architecture
Submitted by grigby1 on Mon, 02/17/2020 - 5:12pm
hardware nodes
VHDL
Training
spare node
self-healing networks
self-healing approach results
self-healing
Resiliency
resilience
Redundancy
pubcrawl
Neurons
neural net architecture
neural chips
neighbor node
modest area overhead
Altira 10 GX FPGA
hardware neural Network architecture
hardware description languages
Hardware
field programmable gate arrays
faulty node
Fault-tolerant
fault tolerant computing
fault detection
Evolvable hardware
Embryonic hardware
current self-healing neural network
composability
complex neural network
Biological neural networks
artificial neural network
biblio
Securing qr codes by rsa on fpga
Submitted by grigby1 on Tue, 01/23/2018 - 2:58pm
Modular Multiplication
XSG
VHDL
RSA
Resiliency
Receivers
QR codes
Public key
pubcrawl
Ciphers
modular exponentiation
image security
FPGA
field programmable gate arrays
encryption
cyber physical systems
Cryptography
