Visible to the public A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation

TitleA highly reliable and tamper-resistant RRAM PUF: Design and experimental validation
Publication TypeConference Paper
Year of Publication2016
AuthorsLiu, R., Wu, H., Pang, Y., Qian, H., Yu, S.
Conference Name2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
ISBN Number978-1-4673-8826-9
Keywordscomposability, Decoding, dummy cells, extrapolation, Hardware, hardware overhead, hardware security, HD, inter-Hamming distance, interconnect layers, invasive tampering, layout obfuscation, layout obfuscation scheme, Logic arrays, multiple RRAM cells, physical unclonable function, pubcrawl, PUF, relaxing transistor, reliability, resilience, Resiliency, resistive RAM, resistive random access memory, RRAM, RRAM arrays, RRAM PUF instances, RRAM PUF properties, RRAM PUF resistance, security, self-destructive feature, split reference, split S/A, split sense amplifier, Tamper resistance, tamper-resistant design, tamper-resistant RRAM PUF, top-level interconnect, uniqueness
Abstract

This work presents a highly reliable and tamper-resistant design of Physical Unclonable Function (PUF) exploiting Resistive Random Access Memory (RRAM). The RRAM PUF properties such as uniqueness and reliability are experimentally measured on 1 kb HfO2 based RRAM arrays. Firstly, our experimental results show that selection of the split reference and offset of the split sense amplifier (S/A) significantly affect the uniqueness. More dummy cells are able to generate a more accurate split reference, and relaxing transistor's sizes of the split S/A can reduce the offset, thus achieving better uniqueness. The average inter-Hamming distance (HD) of 40 RRAM PUF instances is 42%. Secondly, we propose using the sum of the read-out currents of multiple RRAM cells for generating one response bit, which statistically minimizes the risk of early retention failure of a single cell. The measurement results show that with 8 cells per bit, 0% intra-HD can maintain more than 50 hours at 150 degC or equivalently 10 years at 69 degC by 1/kT extrapolation. Finally, we propose a layout obfuscation scheme where all the S/A are randomly embedded into the RRAM array to improve the RRAM PUF's resistance against invasive tampering. The RRAM cells are uniformly placed between M4 and M5 across the array. If the adversary attempts to invasively probe the output of the S/A, he has to remove the top-level interconnect and destroy the RRAM cells between the interconnect layers. Therefore, the RRAM PUF has the "self-destructive" feature. The hardware overhead of the proposed design strategies is benchmarked in 64 x 128 RRAM PUF array at 65 nm, while these proposed optimization strategies increase latency, energy and area over a naive implementation, they significantly improve the performance and security.

URLhttps://ieeexplore.ieee.org/document/7495549/
DOI10.1109/HST.2016.7495549
Citation Keyliu_highly_2016