Visible to the public Study of secure boot with a FPGA-based IoT device

TitleStudy of secure boot with a FPGA-based IoT device
Publication TypeConference Paper
Year of Publication2017
AuthorsLiu, Y., Briones, J., Zhou, R., Magotra, N.
Conference Name2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)
Keywordsauthentication, bitstream decoding, critical components, cryptography, Decoding, effective security provisioning, encrypt system boot image, Encryption, field programmable gate arrays, FPGA bitstream, FPGA design, FPGA-based IoT device, host processor computation power, infrastructure components, Internet of Things, IoT system, Metrics, network on chip security, pubcrawl, resilience, Resiliency, Scalability, Secure Boot, software-based security implementation, system security, system-on-chip, Trojan Horse attacks, Trojan horses, Xilinx Zynq-7000 Series System-on-Chip ZC706 prototype board
AbstractInternet of Things (loT) is network connected "Things" such as vehicles, buildings, embedded systems, sensors, as well as people. IoT enables these objects to collect and exchange data of interest to complete various tasks including patient health monitoring, environmental monitoring, system condition prognostics and prediction, smart grid, smart buildings, smart cities, and do on. Due to the large scale of and the limited host processor computation power in an IoT system, effective security provisioning is shifting from software-based security implementation to hardware-based security implementation in terms of efficiency and effectiveness. Moreover, FPGA can take over the work of infrastructure components to preserve and protect critical components and minimize the negative impacts on these components. In this paper, we employ Xilinx Zynq-7000 Series System-on-Chip (SoC) ZC706 prototype board to design an IoT device. To defend against threats to FPGA design, we have studied Zynq-ZC706 to (1) encrypt FPGA bitstream to protect the IoT device from bitstream decoding; (2) encrypt system boot image to enhance system security; and (3) ensure the FPGA operates correctly as intended via authentication to avoid spoofing and Trojan Horse attacks.
DOI10.1109/MWSCAS.2017.8053108
Citation Keyliu_study_2017