Title | Enabling Ubiquitous Hardware Security via Energy-Efficient Primitives and Systems : (Invited Paper) |
Publication Type | Conference Paper |
Year of Publication | 2019 |
Authors | Alioto, Massimo, Taneja, Sachin |
Conference Name | 2019 IEEE Custom Integrated Circuits Conference (CICC) |
Keywords | attack surface, attacks, cryptography, design requirements, energy-efficient primitives, Entropy, error correction codes, Hardware, hardware security, human factors, HW security, low power, low-end devices, Metrics, power aware computing, power penalty, pubcrawl, pufs, Random access memory, random number generators, Resiliency, Scalability, security, security-sensitive applications, Thermal stability, ubiquitous computing, Ubiquitous Computing Security, ubiquitous hardware security |
Abstract | Security down to hardware (HW) has become a fundamental requirement in highly-connected and ubiquitously deployed systems, as a result of the recent discovery of a wide range of vulnerabilities in commercial devices, as well as the affordability of several attacks that were traditionally considered unlikely. HW security is now a fundamental requirement in view of the massive attack surface that they expose, and the substantial power penalty entailed by solutions at higher levels of abstraction.In large-scale networks of connected devices, attacks need to be counteracted at low cost down to individual nodes, which need to be identified or authenticated securely, and protect confidentiality and integrity of the data that is sensed, stored, processed and wirelessly exchanged. In many security-sensitive applications, physical attacks against individual chips need to be counteracted to truly enable an end-to-end chain of trust from nodes to cloud and actuation (i.e., always-on security). These requirements have motivated the on-going global research and development effort to assure hardware security at low cost and power penalty down to low-end devices (i.e., ubiquitous security).This paper provides a fresh overview of the fundamentals, the design requirements and the state of the art in primitives for HW security. Challenges and future directions are discussed using recent silicon demonstrations as case studies. |
DOI | 10.1109/CICC.2019.8780123 |
Citation Key | alioto_enabling_2019 |